Espressif Systems ESP8684 Series, Hardware Design Manuallines, Page: 8 / 28

2 Schematic Checklist
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
The values of C8, L2 and C9
vary with the actual PCB board.
The values of C1 and C2 vary with
the selection of the crystal.
The value of R1 varies with the actual
PCB board.
ESP8684-MINI-1(pin-out)
NC: No component. ESP8684H2
ESP8684H1
CHIP_EN
GPIO4
GPIO5
GPIO6
U0RXD
ANT
GPIO0
GPIO1
GPIO2
GPIO3
RF_ANT
U0TXD
GPIO2
GPIO3
CHIP_EN
G
P
IO
1
G
P
IO
0
G
P
IO
1
0
G
P
IO
6
G
P
IO
7
G
P
IO
8
G
P
IO
9
GPIO18
U0RXD
U0TXD
G
P
IO
4
G
P
IO
5
GPIO7
GPIO8
GPIO9
GPIO10
GPIO18
GND
VDD33
GND
GND GND GND
GND GND
GND
VDD33
GND GND GND
VDD33
VDD33
GND
GND
GND
GND GND
VDD33
GND
GND
Title
Size Page Name R e v
Date: Sheet o f
Confidential and Proprietary
<02_ESP8684-MINI-1> V1.0
ESP8684-MINI-1
A4
2 2 Tuesday, January 11, 2022
Title
Size Page Name R e v
Date: Sheet o f
Confidential and Proprietary
<02_ESP8684-MINI-1> V1.0
ESP8684-MINI-1
A4
2 2 Tuesday, January 11, 2022
Title
Size Page Name R e v
Date: Sheet o f
Confidential and Proprietary
<02_ESP8684-MINI-1> V1.0
ESP8684-MINI-1
A4
2 2 Tuesday, January 11, 2022
C1
TBD
R2 499(1%)
R
1
0
(1
%
)
Y1
40MHz
X
IN
1
G
N
D
2
X
O
U
T
3
G
N
D
4
L1 2.0nH(0.1nH)
D1
ESD
C6
0.1uF/6.3V(10%)
U2
ANT
1
VDDA3P3
2
VDDA3P3
3
GPIO0
4
GPIO1
5
GPIO2
6
C
H
IP
_
E
N
7
M
T
M
S
9
M
T
D
I
1
0
V
D
D
3
P
3
_
R
T
C
1
1
M
T
C
K
1
2
MTDO
13
GPIO8
14
GPIO9
15
GPIO10
16
VDD3P3_CPU
17
U
0
R
X
D
1
9
U
0
T
X
D
2
0
X
T
A
L
_
N
2
2
X
T
A
L
_
P
2
3
G
N
D
2
5
G
P
IO
3
8
V
D
D
A
2
4
V
D
D
A
2
1
GPIO18
18
C9
TBD
C3
1uF/6.3V(20%)
C10
0.1uF/6.3V(10%)
C4
10nF/6.3V(10%)
U3
ESP8684-MINI-1
GND
1
3V3
3
IO
9
2
3
NC
4
IO2
5
IO3
6
NC
7
NC
9
NC
10
N
C
1
5
IO
1
0
1
6
N
C
1
7
IO
4
1
8
IO
5
1
9
NC
32
TXD0
31
RXD0
30
NC
34
NC
33
IO18
26
NC
29
NC
28
NC
27
IO
7
2
1
IO
8
2
2
IO
0
1
2
IO
1
1
3
GND
52
IO
6
2
0
NC
35
N
C
2
4
E
P
A
D
4
9
GND
2
GND
53
GND
51
GND
50
EN
8
G
N
D
3
6
G
N
D
3
7
G
N
D
3
8
G
N
D
3
9
G
N
D
4
0
G
N
D
4
1
G
N
D
4
2
G
N
D
4
3
G
N
D
4
4
G
N
D
4
5
G
N
D
4
6
G
N
D
4
7
G
N
D
4
8
G
N
D
1
4
GND
11
NC
25
ANT1
PCB_ANT
1
2
C7
0.1uF/6.3V(10%)
C8
TBD
C2
TBD
C12
0.1uF/6.3V(10%)
C5
10uF/6.3V(20%)
L2
TBD
Figure 3: Schematic for the Analog Power Supply Pins
Notice:
• The recommended power supply voltage for ESP8684 is 3.3 V and the output current is no less than 500 mA.
• It is suggested to add an ESD protection diode at the power entrance.
2.2 Power­on Sequence and System Reset
2.2.1 Power­on Sequence
ESP8684 uses a 3.3 V system power supply. The chip should be activated after the power rails have stabilized.
This is achieved by delaying the activation of CHIP_EN after the 3.3 V rails have been brought up. More details
can be found in Section 2.2.3 .
Notice:
To ensure that stable power is supplied to the chip during power-up, it is advised to add an RC delay circuit at the CHIP_EN
pin. The recommended setting for the RC delay circuit is usually R = 10 k Ω and C = 1 µ F. However, specific parameters
should be adjusted based on the power-up timing of the power supply and the power-up and reset sequence timing of
the chip.
2.2.2 System Reset
CHIP_EN serves as the reset pin of ESP8684. The reset voltage (V
IL
_
nRST
) should be in the range of (–0.3 ~
0.25 × VDD) V. VDD is the I/O voltage for a particular power domain of pins. To avoid reboots caused by external
interferences, make the CHIP_EN trace as short as possible. Also, add a pull-up resistor as well as a capacitor to
the ground whenever possible.
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ESP8684 Series Hardware Design Guidelines v1.1