6.1.6 Alternative UART pins tables
The following tables shows an alternative UART configuration
UART1 interfaces
Pin number
Pin Name on i.MX
Signal reference
Voltage reference
79
UART1_CTS_B
UART1_CTS
+3,3V
183
UART1_RTS_B
UART1_RTS
+3,3V
27 / 116
GPIO1_IO02 / UART1_TX_DATA
UART1_TXD
+3,3V
26 / 117
GPIO1_IO03 / UART1_RX_DATA
UART1_RXD
+3,3V
Table 40
UART2 interfaces
Pin number
Pin Name on i.MX
Signal reference
Voltage reference
120
UART2_CTS_B
UART2_CTS
+3,3V
66 / 121
UART3_RX_DATA / UART2_RTS_B
UART2_RTS
+3,3V
112
UART2_TX_DATA
UART2_TXD
+3,3V
113
UART2_RX_DATA
UART2_RXD
+3,3V
Table 41
UART3 interfaces
Pin number
Pin Name on i.MX
Signal reference
Voltage reference
35 / 118
NAND_CE1_B / UART3_CTS_B
UART3_CTS
+3,3V
119
UART3_RTS_B
UART3_RTS
+3,3V
191
UART3_TX_DATA
UART3_TXD
+3,3V
66
UART3_RX_DATA
UART3_RXD
+3,3V
Table 42
UART4 interfaces
Pin number
Pin Name on i.MX
Signal reference
Voltage reference
161
LCD_HSYNC
UART4_CTS
+3,3V
160
LCD_VSYNC
UART4_RTS
+3,3V
125 / 23
LCD_CLK / UART4_TX_DATA
UART4_TXD
+3,3V
162 / 24
LCD_ENABLE / UART4_RX_DATA
UART4_RXD
+3,3V
Table 43
UART5 interfaces
Pin number
Pin Name on i.MX
Signal reference
Voltage reference
166 / 184
CSI_DATA03 / GPIO1_IO09
UART5_CTS
+3,3V
170 / 38
CSI_DATA02 / GPIO1_IO08
UART5_RTS
+3,3V
168 / 25 / 111
CSI_DATA00 / GPIO1_IO04 / UART5_TX_DATA
UART5_TXD
+3,3V
171 / 110
CSI_DATA01 / UART5_RX_DATA
UART5_RXD
+3,3V
Table 44
D N :
4 6
