background image

5

5

4

4

3

3

2

2

1

1

D

D

C

C

B

B

A

A

UIF_JOYSTICK4
UIF_JOYSTICK3
UIF_JOYSTICK2
UIF_JOYSTICK1

UIF_PB0
UIF_PB1
UIF_PB2
UIF_PB3

BC_BUS_FPGA0

BC_BUS_FPGA1

BC_BUS_FPGA2

BC_BUS_FPGA3

BC_BUS_FPGA4

BC_BUS_FPGA5

BC_BUS_FPGA6

BC_BUS_FPGA7

BC_BUS_FPGA8

BC_BUS_FPGA9

BC_BUS_FPGA10

BC_BUS_FPGA11

BC_BUS_FPGA12

BC_BUS_FPGA13

BC_BUS_FPGA14

BC_BUS_FPGA15

BC_BUS_FPGA16

BC_BUS_FPGA17

BC_BUS_FPGA18

BC_BUS_FPGA19

BC_BUS_FPGA20

BC_BUS_FPGA21

BC_BUS_FPGA22

BC_BUS_FPGA23

BC_BUS_FPGA24

BC_BUS_FPGA25

BC_BUS_FPGA26

BC_BUS_FPGA27

BC_BUS_FPGA_#OE2
BC_BUS_FPGA_#OE3
BC_BUS_FPGA_DIR0
BC_BUS_FPGA_DIR2
BC_BUS_FPGA_DIR3

BC_BUS_FPGA_#OE0

BC_BUS_FPGA_#OE0

BOARD_REVISION[2:0]

PCB_REVISION[2:0]

BC_BUS_CONNECT_SPI
BOARD_REVISION2
BOARD_REVISION1
BOARD_REVISION0
PCB_REVISION2
PCB_REVISION1
PCB_REVISION0

BOARD_REVISION0

BOARD_REVISION1

BOARD_REVISION2

PCB_REVISION0

PCB_REVISION1

PCB_REVISION2

FPGA_ADDR4
FPGA_ADDR5
FPGA_ADDR6
FPGA_ADDR7
FPGA_ADDR8
FPGA_ADDR9
FPGA_ADDR10
FPGA_ADDR11
FPGA_ADDR12
FPGA_ADDR13
FPGA_ADDR14
FPGA_ADDR15
FPGA_ADDR16
FPGA_ADDR17
FPGA_ADDR18
FPGA_ADDR19
FPGA_ADDR20
FPGA_ADDR21

UIF_JOYSTICK0

FPGA_DATA12
FPGA_DATA13
FPGA_DATA14
FPGA_DATA15

FPGA_DATA9
FPGA_DATA10
FPGA_DATA11

BC_BUS_FPGA_#OE1
BC_BUS_FPGA_DIR1
DISPLAY_DATA6
DISPLAY_DATA5

FPGA_DATA0
FPGA_DATA1
FPGA_DATA2
FPGA_DATA3
FPGA_DATA4
FPGA_DATA5
FPGA_DATA6

FPGA_DATA8

FPGA_ADDR0
FPGA_ADDR1
FPGA_ADDR2
FPGA_ADDR3

FPGA_DATA7

DISPLAY_DATA7

DISPLAY_DATA8

FPGA_ADDR23

FPGA_ADDR22

GND

GND

GND

GND

GND

FPGA_VCCO0

FPGA_VCCO0

FPGA_VCCO3

FPGA_VCCO0

FPGA_ADDR[23..0]

(p 6)

BC_BUS_FPGA_#OE[3..0]

(p 14)

BC_BUS_FPGA_DIR[3..0]

(p 14)

FPGA_DATA[15..0]

(p 6)

UIF_JOYSTICK[4..0]

(p 4)

UIF_PB[3..0]

(p 4)

BC_BUS_FPGA[27..0]

(p 14)

AEM_PB

(p 4)

DISPLAY_DATA[17..1]

(p 5,7,9)

BC_BUS_CONNECT_SPI

(p 14)

Size

Designed:

Revision

Sheet

of

Approved:

Sheet Created Date

Sheet Modified Date

Document number

Schematic Title

Design Created Date:

BOM Doc No:

Page Title

C

BRD3200C

Tuesday, January 19, 2010

8

21

A3

JNO

JNO

EFM32 Development Kit - Mainboard

<Cage Code>

Saturday, March 21, 2009

W ednesday, December 03, 2008

TOP

<Schematic Path>

Board Control - Memory & BC bus

Size

Designed:

Revision

Sheet

of

Approved:

Sheet Created Date

Sheet Modified Date

Document number

Schematic Title

Design Created Date:

BOM Doc No:

Page Title

C

BRD3200C

Tuesday, January 19, 2010

8

21

A3

JNO

JNO

EFM32 Development Kit - Mainboard

<Cage Code>

Saturday, March 21, 2009

W ednesday, December 03, 2008

TOP

<Schematic Path>

Board Control - Memory & BC bus

Size

Designed:

Revision

Sheet

of

Approved:

Sheet Created Date

Sheet Modified Date

Document number

Schematic Title

Design Created Date:

BOM Doc No:

Page Title

C

BRD3200C

Tuesday, January 19, 2010

8

21

A3

JNO

JNO

EFM32 Development Kit - Mainboard

<Cage Code>

Saturday, March 21, 2009

W ednesday, December 03, 2008

TOP

<Schematic Path>

Board Control - Memory & BC bus

TP39

TP39

R58
100K

NM

R58
100K

NM

R60
100K

NM

R60
100K

NM

R65
100K

R65
100K

TP34

TP34

TP38

TP38

TP37

TP37

R63
100K

R63
100K

TP43

TP43

TP41

TP41

U6A

XC3S200A_4_FT256C_SWAP0

U6A

XC3S200A_4_FT256C_SWAP0

IO_L01N_0

C13

IO_L01P_0

D13

IO_L02N_0

B14

IO_L02P_0/VREF_0

B15

IO_L03N_0

D11

IO_L03P_0

C12

IO_L04N_0

A13

IO_L05N_0

A12

IO_L05P_0

B12

IO_L06N_0/VREF_0

E10

IO_L10N_0/GCLK7

A9

IO_L10P_0/GCLK6

C9

IO_L11N_0/GCLK9

D8

IO_L11P_0/GCLK8

C8

IO_L12N_0/GCLK11

B8

IO_L12P_0/GCLK10

A8

IO_L13N_0

C7

IO_L14N_0/VREF_0

E7

IO_L14P_0

F8

IO_L15N_0

B6

IO_L15P_0

A6

IO_L16N_0

C6

IO_L16P_0

D7

IO_L17N_0

C5

IO_L17P_0

A5

IO_L18N_0

B4

IO_L18P_0

A4

IO_L19N_0

B3

IO_L19P_0

A3

IO_L20N_0/PUDC_B

D5

IO_L20P_0/VREF_0

C4

IP0_0

D6

IP4_0

F9

IP5_0

F10

IP1_0

D12

IP3_0

F7

IP2_0

E6

IP6_0/VREF_0

E9

VCCO_0

B5

VCCO_0

E8

VCCO_0

B9

VCCO_0

B13

IO_L04P_0

A14

IO_L08P_0

B10

IO_L08N_0

A10

IO_L07P_0

C11

IO_L07N_0

A11

IO_L09N_0/GCLK5

D9

IO_L13P_0

A7

IO_L06P_0

D10

IO_L09P_0/GCLK4

C10

TP42

TP42

TP40

TP40

TP36

TP36

U6D

XC3S200A_4_FT256C_SWAP0

U6D

XC3S200A_4_FT256C_SWAP0

IO_L01N_3

C1

IO_L01P_3

C2

IO_L02N_3

D3

IO_L02P_3

D4

IO_L03N_3

E1

IO_L03P_3

D1

IO_L05N_3

E2

IO_L05P_3

E3

IO_L09P_3

G3

IO_L10N_3

H5

IO_L10P_3

H6

IO_L11N_3/LHCLK1

H1

IO_L11P_3/LHCLK0

G2

IO_L12N_3/IRDY2/LHCLK3

J3

IO_L12P_3/LHCLK2

H3

IO_L14N_3/LHCLK5

J1

IO_L14P_3/LHCLK4

J2

IO_L15N_3/LHCLK7

K1

IO_L15P_3/TRDY2/LHCLK6

K3

IO_L16N_3

L2

IO_L16P_3/VREF_3

L1

IO_L17N_3

J6

IO_L17P_3

J4

IO_L18N_3

L3

IO_L18P_3

K4

IO_L19N_3

L4

IO_L19P_3

M3

IO_L20N_3

N1

IO_L20P_3

M1

IO_L22N_3

P1

IO_L22P_3

N2

IO_L23N_3

P2

IO_L23P_3

R1

IO_L24N_3

M4

IO_L24P_3

N3

IP_L04N_3/VREF_3

F4

IP_L04P_3

E4

IP_L06N_3/VREF_3

G5

IP_L06P_3

G6

IP_L13N_3

J7

IP_L13P_3

H7

IP_L21N_3

K6

IP_L21P_3

K5

IP_L25N_3/VREF_3

L6

IP_L25P_3

L5

IO_L09N_3

H4

IO_L08P_3

F1

IO_L08N_3/VREF_3

G1

IO_L07P_3

F3

IO_L07N_3

G4

VCCO_3

D2

VCCO_3

H2

VCCO_3

M2

VCCO_3

J5

TP44

TP44

TP45

TP45

R59
100K

NM

R59
100K

NM

TP35

TP35

R64
100K

R64
100K

Downloaded from 

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Summary of Contents for EFM32-G8XX-DK

Page 1: ...velopment for the EFM32 Gecko MCU family with the ARMCortex M3 CPU core Main features Advanced Energy Monitoring provides real time visibility into the energy consumption of an application or prototyp...

Page 2: ...s 3 axis accelerometer SPI Flash and microSD card reader SPI mode EEPROM Temperature sensor IrDA tranceiver 256Kx16bit 512KB parallel bus SRAM 2Mx16 4MB parallel bus NOR Flash Ambient light sensor and...

Page 3: ...160 seg LCD Display optional User LEDs USART SPI Bus I2C Bus 4 2 DAC ADC 8 EEPROM Temperature Sensor SPI Flash Accelerometer Ambient light Potentiometer RS232 A RS232 B IrDA 2 8 RS232 Level Shifter TX...

Page 4: ...crocontrollers 2010 04 09 t0005_1 10 4 www energymicro com 3 Mainboard hardware layout The layout of the EFM32 G8XX DK mainboard is shown below Figure 3 1 EFM32 G8XX DK hardware layout Downloaded from...

Page 5: ...ected to needs to be able to deliver 500 mA 5 unit loads 4 2 External power supply By using the DC jack plug located on the motherboard the EFM32 G8XX DK can be powered by an external power supply The...

Page 6: ...U is the reset button on the MCU board This will only reset the MCU It can also be reset using the board controller by writing to the RESET_MCU bit in the RESET register Finally it can be reset by deb...

Page 7: ...ck 6 5 Differential analog input This BNC input signal is converted to a differential signal by a differential operational amplifier using ground as reference The op amp output common mode voltage is...

Page 8: ...S232_SHUTDOWN bit in the PERCTRL register 6 10 Accelerometer This is a 3 axis accelerometer that connects to the ADC of the EFM It outputs voltages proportional to the g forces for each axis There are...

Page 9: ...ter in the board controller must also be set 6 17 microSD A microSD slot is connected to the SPI module of the EFM The peripheral is connected directly to the EFM when the SPI bit in the PERCTRL regis...

Page 10: ...PI and EBI have different requirements regarding pin usage see table below Table 7 1 GPIO Usage GPIO Port SPI Pins EBI Pins A 0 6 15 B C 2 5 13 12 D E 8 15 F 2 5 The advantage of EBI over SPI is that...

Page 11: ...addr Usable addresses for these functions including bit fields are defined in the header file dvk_bcregisters h The functions void DVK_enablePeripheral DVKPeripheral peri void DVK_disablePeripheral D...

Page 12: ...3 Add and include the EFM32_CMSIS files startup_efm32 s system_efm32 c core_cm3 c to your project 4 Add and include _all_ BSP package c files with the dvk prefix to your project 5 Configure include p...

Page 13: ...l configuration can be set by entering the CFG page from the main page and then entering the Peri page All peripherals connected to the EFM can be en or disabled individually using the list displayed...

Page 14: ...amplifier is adjusted for current measurement in a specific range The ranges for the amplifiers overlap and a change between the two occurs when the current is 200uA To reduce noise averaging of the s...

Page 15: ...ck state register 0x00E BC_AEM R AEM button status register 0x010 BC_DISPLAY_CTRL RW Display control register 0x012 BC_EBI_CFG RW EBI configuration register 0x014 BC_BUS_CFG RW BUS configuration regis...

Page 16: ...ce on the board controller Value Mode Description 0 SPI The BC is configured to use the SPI interface 1 EBI The BC is configured to use the EBI interface 10 2 2 BC_EM Energy Mode register Offset Bit P...

Page 17: ...is register to change the DVK user leds 10 2 5 BC_PUSHBUTTON User pushbutton status register Offset Bit Position 0x008 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reset 0x0 Access R Name PUSHBUTTON Bit Name...

Page 18: ...he center switch of the joystick 3 LEFT 0 R Joystick LEFT switch state register Read this register to get the status of the left switch of the joystick 2 UP 0 R Joystick UP switch state register Read...

Page 19: ...t Position 0x012 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reset 0x0 Access RW Name EBI_CFG Bit Name Reset Access Description 15 2 Reserved To ensure compatibility with future devices always write bits to...

Page 20: ...ansceiver 14 RS232_SHUTDOWN 0 RW Shut down RS232 driver Set this bit to shut down the RS232 driver It is strongly recommended that this is done when the application does not use RS232 13 ACCEL_SELFTES...

Page 21: ...Offset Bit Position 0x01A 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reset 0 Access R Name AEM Bit Name Reset Access Description 15 1 Reserved To ensure compatibility with future devices always write bits...

Page 22: ...eset state 0 FLASH 0 RW Flash reset signal Set this bit to put the Nor flash into a reset state 10 2 16 BC_ADC_START ADC start byte register Offset Bit Position 0x020 15 14 13 12 11 10 9 8 7 6 5 4 3 2...

Page 23: ...000 Access R Name ADC_START Bit Name Reset Access Description 15 0 ADC_START 0x0000 R ADC data register This register contains the result of the latest conversion 10 2 19 BC_HW_VERSION Hardware versio...

Page 24: ...it Position 0x02C 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reset 0x0 0x0 0x00 Access R R R Name MAJOR MINOR PATCHLEVEL Bit Name Reset Access Description 15 12 MAJOR 0x0 R Firmware major revision Read the...

Page 25: ...ess RW Name SCRATCH_EFM0 Bit Name Reset Access Description 15 0 SCRATCH_EFM0 0x0000 RW EFM scratch register 0 This register can be used as a scratch register for the EFM The board controller has read...

Page 26: ...e EFM The board controller has read only access 10 2 26 BC_SCRATCH_EFM3 EFM scratch register 3 Offset Bit Position 0x036 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reset 0x0000 Access RW Name SCRATCH_EFM3...

Page 27: ...et 0x0000 Access RW Name SCRATCH_BC1 Bit Name Reset Access Description 15 0 SCRATCH_BC1 0x0000 RW BC scratch register 1 This register can be used as a scratch register for the BC The EFM has read only...

Page 28: ...interrupt flag This bit is set when the AEM button is pushed or released It will assert an interrupt to the EFM if the interrupt has been enabled This bit is cleared by writing a 1 to it 2 JOYSTICK 0...

Page 29: ...to 0 3 AEM 0 RW AEM interrupt enable If this bit is set an interrupt is asserted when the corresponding interrupt flag is set 2 JOYSTICK 0 RW Joystick interrupt enable If this bit is set an interrupt...

Page 30: ...rt Function A0 LCD_SEG13 A1 LCD_SEG14 A2 LCD_SEG15 A3 LCD_SEG16 A4 LCD_SEG17 A5 LCD_SEG18 A6 LCD_SEG19 A9 LCD_SEG37 A15 LCD_SEG12 B0 LCD_SEG32 B1 LCD_SEG33 B2 LCD_SEG34 B3 LCD_SEG20 B4 LCD_SEG21 B5 LC...

Page 31: ...0 I9 AUDIO_IN_RIGHT D1 ADC_CH1 B51 AUDIO_IN B51 I10 AUDIO_IN_LEFT D2 ADC_CH2 B56 ACCEL B56 I11 ACCEL_XOUT D3 ADC_CH3 B57 ACCEL B57 I12 ACCEL_YOUT D4 ADC_CH4 B58 ACCEL B58 I13 ACCEL_ZOUT D5 ADC_CH5 B70...

Page 32: ...Nomenclature Name Description MCU The pin name of the MCU MCU function The I O function on that pin that is used for this resource EFM32_B The corresponding pin number on the EFM32_B connector If thi...

Page 33: ...ce to ensure good connections The connectors are rated for 100 plugin cycles For pinout check the schematics 12 2 Debug connector This connector is used for Debug In and Debug Out see Debug chapter Th...

Page 34: ...e configuration chapter to find out how to change the debug setting Table 13 1 Debug modes Mode Description Debug MCU In this mode the built in debugger is connected to EFM on the BRD3300A Debug IN In...

Page 35: ...n evaluation version of IAR is included in the EFM32 G8XX DK package Check the quick start guide and IAR s own documentation on how to use it 14 2 KEIL An evaluation version of KEIL is included in the...

Page 36: ...m host to target that can be used to flash directly from the kit GUI Flash submenu rm Remove file flash Flashes the EFM32 program memory with binary file starting from flash address 0x0000000 Enter fi...

Page 37: ...t version information can be read from the EFM32 G8XX DK by entering the About page from the main page in the GUI and then pushing Info Table 16 1 Current versions Type Version Released Firmware revis...

Page 38: ...but for a complete overview check the BRD3300A user manual Features The worlds most energy friendly microcontroller Compatible with the Advanced Energy Monitoring AEM system of the EFM32 Gecko Develop...

Page 39: ...ete overview check the prototyping board user manual 18 1 Overview Features Ready to use prototyping area for hole mount TSSOP SO SOT23 6 SOT23 and 0805 SMD components VMCU power domain tracked by the...

Page 40: ...o longer be changed The same issue may also result in wrong VMCU setting after startup A power cycle of the DVK fixes the problem This errata is fixed in firmware version 1 1 1 or newer 19 2 2 Storing...

Page 41: ...s 2010 04 09 t0005_1 10 41 www energymicro com 1 0 1 Description Enabling Serial Wire Output SWO would cause onboard firmware to fail An upgrade to firmware version 1 1 1 or newer fixes this errata Do...

Page 42: ...friendly microcontrollers 2010 04 09 t0005_1 10 42 www energymicro com 20 Schematic On the next pages you can find the schematic and the assembly drawings of the main board Downloaded from Elcodis co...

Page 43: ...onitoring Size Designed Revision Sheet of Approved Sheet Created Date Sheet Modified Date Document number Schematic Title Design Created Date BOM Doc No Page Title C BRD3200C Tuesday January 19 2010 1...

Page 44: ...D 4 2SHDN 6 1SHDN 5 GND_HEAT 11 SJ1 3515 J2 SJ1 3515 J2 1 2 4 3 5 C16 10U C16 10U R25 10R R25 10R TP24 TP24 P2 BNC P2 BNC 5 4 2 3 1 TP25 TP25 R36 27K R36 27K U3A MAX9724A U3A MAX9724A INL 6 OUTL 11 TP...

Page 45: ...200C Tuesday January 19 2010 3 21 A3 JNO JNO EFM32 Development Kit Mainboard Cage Code Saturday March 21 2009 Wednesday December 03 2008 TOP Schematic Path Sensors SPI bus I2C bus and IO U42A STDS75 U...

Page 46: ...o Page Title C BRD3200C Tuesday January 19 2010 4 21 A3 JNO JNO EFM32 Development Kit Mainboard Cage Code Saturday March 21 2009 Wednesday December 03 2008 TOP Schematic Path User Interfaces R188 100R...

Page 47: ...ce Size Designed Revision Sheet of Approved Sheet Created Date Sheet Modified Date Document number Schematic Title Design Created Date BOM Doc No Page Title C BRD3200C Tuesday January 19 2010 5 21 A3...

Page 48: ...ber Schematic Title Design Created Date BOM Doc No Page Title C BRD3200C Tuesday January 19 2010 6 21 A3 JNO JNO EFM32 Development Kit Mainboard Cage Code Saturday March 21 2009 Wednesday December 03...

Page 49: ...Sheet Modified Date Document number Schematic Title Design Created Date BOM Doc No Page Title C BRD3200C Tuesday January 19 2010 7 21 A3 JNO JNO EFM32 Development Kit Mainboard Cage Code Saturday Mar...

Page 50: ...JNO EFM32 Development Kit Mainboard Cage Code Saturday March 21 2009 Wednesday December 03 2008 TOP Schematic Path Board Control Memory BC bus Size Designed Revision Sheet of Approved Sheet Created D...

Page 51: ...Date Document number Schematic Title Design Created Date BOM Doc No Page Title C BRD3200C Tuesday January 19 2010 9 21 A3 JNO JNO EFM32 Development Kit Mainboard Cage Code Saturday March 21 2009 Wedn...

Page 52: ...ember 03 2008 TOP Schematic Path Board Control FPGA Power Debug C41 10N C41 10N U7A 24 00MHz U7A 24 00MHz OUTPUT 3 OE 1 C60 47U C60 47U TP154 TP154 C62 10N C62 10N R56 22R R56 22R U56C 74LVC2G125DC U5...

Page 53: ...c Path Control MCU LED77 YELLOW LED77 YELLOW 2 1 PORT A PORT B PORT C U17A Control MCU PORT A PORT B PORT C U17A Control MCU PA0 WKUP USART2_CTS ADC123_IN0 TIM2_CH1_ETR TIM5_CH1 TIM8_ETR G2 PA1 USART2...

Page 54: ...Tuesday January 19 2010 12 21 A3 JNO JNO EFM32 Development Kit Mainboard Cage Code Saturday March 21 2009 Wednesday December 03 2008 TOP Schematic Path Control MCU Board Control interface R331 0R R331...

Page 55: ...January 19 2010 13 21 A3 JNO JNO EFM32 Development Kit Mainboard Cage Code Saturday March 21 2009 Wednesday December 03 2008 TOP Schematic Path Debug Interface U61B 74LVC2G125DC U61B 74LVC2G125DC 5 7...

Page 56: ...2008 TOP Schematic Path Board Control EFM32 bus level shift switch C73 100N C73 100N U13A 74LVC16T245 U13A 74LVC16T245 1A1 47 1A2 46 1A3 44 1A4 43 1A5 41 1A6 40 1A7 38 1A8 37 1B1 2 1B2 3 1B3 5 1B4 6...

Page 57: ...SO p 3 18 EXP32_B 83 0 p 2 3 9 11 12 14 16 MCUDBG_ TRST p 13 17 FPGA_ INT p 7 17 MCUDBG_ RESET p 13 17 MCUDBG_TDI p 13 17 EFM32_B 83 0 p 7 9 11 12 13 14 16 17 18 20 SENSOR_AMBIENT_LIGHT_CONNECT p 9 SE...

Page 58: ...03 2008 TOP Schematic Path EXP32 signal assignments 2 Size Designed Revision Sheet of Approved Sheet Created Date Sheet Modified Date Document number Schematic Title Design Created Date BOM Doc No Pag...

Page 59: ...ry 19 2010 17 21 A3 JNO JNO EFM32 Development Kit Mainboard Cage Code Saturday March 21 2009 Wednesday December 03 2008 TOP Schematic Path EFM32 Board Connectors Size Designed Revision Sheet of Approv...

Page 60: ...JNO EFM32 Development Kit Mainboard Cage Code Saturday March 21 2009 Wednesday December 03 2008 TOP Schematic Path EXP32 Board Connectors Size Designed Revision Sheet of Approved Sheet Created Date S...

Page 61: ...LED119 GREEN LED119 GREEN 2 1 C258 100N C258 100N TP87 TP87 C143 100N C143 100N C139 100N C139 100N R133 0R R133 0R L15 BLM41P600S L15 BLM41P600S 1 2 LED120 GREEN LED120 GREEN 2 1 C140 22U C140 22U L...

Page 62: ...N C126 100N C194 1N C194 1N R355 1R R355 1R R353 0R NM R353 0R NM L28 BLM21B102S L28 BLM21B102S 1 2 R123 56K R123 56K R376 0R R376 0R R351 56K R351 56K R215 10K R215 10K C278 100N C278 100N C281 100N...

Page 63: ...pment Kit Mainboard Cage Code Tuesday September 08 2009 Wednesday December 03 2008 TOP Power Monitoring Size Designed Revision Sheet of Approved Sheet Created Date Sheet Modified Date Document number...

Page 64: ...18 RP19 RP20 RP21 RP22 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29 R30 R32 R33 R35 R36 R38 R39 R40 R41 R42 R43 R45 R46 R47 R48 R52 R53 R54 R5...

Page 65: ...TP40 TP41 TP42 TP43 TP44 TP45 TP50 TP60 TP61 TP62 TP63 TP69 TP74 TP88 TP98 TP117 TP130 TP131 TP132 TP133 TP134 TP135 TP136 TP139 TP140 TP154 TP155 TP156 TP159 TP160 TP161 TP162 TP163 TP164 TP165 TP166...

Page 66: ...age 10 7 1 Installation location 10 7 2 Resource usage 10 7 3 Application Programming Interface 10 7 4 Example Applications 11 7 5 How to include in your own applications 12 7 6 Chip errata 12 8 Confi...

Page 67: ...inary the world s most energy friendly microcontrollers 2010 04 09 t0005_1 10 67 www energymicro com 19 2 DVK firmware errata 40 20 Schematic 42 Downloaded from Elcodis com electronic components distr...

Page 68: ...t energy friendly microcontrollers 2010 04 09 t0005_1 10 68 www energymicro com List of Figures 2 1 EFM32 G8XX DK Block Diagram 3 3 1 EFM32 G8XX DK hardware layout 4 Downloaded from Elcodis com electr...

Page 69: ...10 69 www energymicro com List of Tables 7 1 GPIO Usage 10 9 1 AEM accuracy 14 11 1 Connections 30 11 2 Nomenclature 32 12 1 Debug connector pinout 33 13 1 Debug modes 34 15 1 Gecko Commander 36 16 1...

Page 70: ...Downloaded from Elcodis com electronic components distributor...

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