Pin Number
Connection
Series Resistor
1
VCC_3V3_MOD
-
2
FMC_TMS
100
Ω
3, 5, 7, 9
GND
-
4
FMC_TCK
22
Ω
6
FMC_TDO
100
Ω
8
FMC_TDI
100
Ω
10
FMC_TRST#
100
Ω
Table 15: J1506 - FPGA TAG Connector
Warning!
The JTAG pins are connected to the FMC Mezzanine device via small-value series resistors. Use only
VCC_IO voltages compliant with the equipped FMC Mezzanine device. Any other voltages may damage
the equipped FMC Mezzanine device.
4.17
Anios I/O Connector IO0/IO1 (J1501/J1505)
The Anios I/O connectors can be used for user applications: each connector provides 24 user I/Os, a dif-
ferential clock connection, connectivity to the I2C bus, and power supply connections. The clock, data and
I2C signals are routed to the module connector - for details, refer to the ST1 Base Board User
Schematics [4].
Warning!
The Anios I/O pins are connected directly to the FPGA/SoC device. Use only VCC_IO voltages compliant
with the equipped FPGA/SoC device; any other voltage may damage the mounted Mercury FPGA/SoC
module, as well as other devices on the ST1 base board.
4.18
I/O Connectors IO2/IO3/IO4 (J1500/J1504/J1507)
Three I/O connectors (2 x 6) male pin headers can be used for user applications: each connector provides
8 user I/Os and 3.3 V power supply connections.
The signals on IO3 and IO4 are connected via 100
Ω
series resistors to the module connector, while the
signals on IO2 are connected via 100
Ω
series resistors to the module connector and in parallel to the
FTDI (UART_RX/TX_LS) and to user LED0 and LED1. For details, refer to the ST1 Base Board User
Schematics [4].
The I/O connector IO2 is Digilent Pmod™ compatible when VCC_IO_B and VCC_IO_A are 3.3 V.
The I/O connectors IO3 and IO4 are Digilent Pmod™ compatible when VCC_IO_A is 3.3 V.
D-0000-456-001
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Version 02, 23.07.2020
