Display/Monitor Interface (PC3J1)
Jack – Pin #
Function
2
6
17
J10-7, gate U1D will go low at pin 11 forcing logic lows at the outputs of U1B
through U2A. The resulting low at J4-3 will shut down power supplies A3PS1/
PS2 causing the 500W UHF Power Amplifier to become inactive. Op-Amp U8A
will also go negative supplying a low at J10-21, PC3J1-21, LEVEL ADJUST
PC3R16, PC3J1-23, J10-23, J8-7 and PC1-7, causing buffer PC1U9 to set IF
input attenuator PC1CR7/CR8 to maximum attenuation. The Exciter and
transmitter are now in standby and prevented from radiating a signal.
J10 – 9
AGC/MANUAL: An open or ground will appear here depending on the position
of the front panel AGC/MANUAL switch PC3S2 which determines if the
IF/Converter (PC1) output AGC is active (in/high) or fixed (out/low). Releasing
the front panel AGC/MANUAL switch will supply a ground to U4A-2 causing the
outputs of U4D and U4C to go low, switching PC1S2 to place a ground on
PC1U18. This low forces PIN diodes PC1CR9/CR10 to stabilize at the center of
their attenuation range (
3dB) thereby inhibiting the AGC while extinguishing the
front panel AGC ACTIVE LED PC3DS6 via J10-18, PC3J1-18 and PC3Q6. With
the AGC/MANUAL switch pressed in, a high will appear at J10-9 and, assuming
all other inputs to U4C, U4D and U4A are high, the high at J8-10 will release
switch PC1S2, remove the ground from PC1U18 and release diodes PC1CR9/
CR10 to respond to the normal output AGC voltages while AGC ACTIVE lamp
PC3DS6 turns on.
J10 – 11
VSWR LED: If high reflected power at the output of the Exciter or transmitter
initiates a VSWR overload, pin 6 of flip-flop U9A will shift high causing VSWR
OVERLOAD LED PC3DS8 to illuminate via J10-11, PC3J1-11 and PC3Q8.
Under normal operation U9A-6 and the associated VSWR LED line will be low
keeping VSWR OVERLOAD LED PC3DS8 off.
J10 – 13
VSWR RESET: This input is connected to the front panel VSWR RESET
momentary switch PC3S3. In the event of a VSWR overload, pressing this
switch provides a ground to reset pin 4 of flip-flop U9A which changes the states
of pins 5 & 6 to their normal Q/high and Q NOT/low outputs. As a consequence,
the high activating LED PC3DS8 is removed turning off the front panel VSWR
OVERLOAD indicator and the low at U2D-13 switches high sending U2A-3 and
U8A-1 in the same direction after ramp-up circuit R26/R27/CR1/C17 charges.
The high at J10-21 proceeds to PC3J1-21, LEVEL ADJUST PC3R16, PC3J1-23,
J10-23, J8-7 and PC1-7 causing buffer PC1U9 to release IF input attenuator
PC1CR7/CR8 to normal attenuation. This action brings the Exciter and trans-
mitter out of standby by slowly increasing the unit’s output power to normal.
J10 – 14
REFLECTED POWER: No connection
J10 – 15
FORWARD POWER: From Metering Detector A3J3-5 via J9-5, a voltage pro-
portional to the forward output power of the Exciter is provided to buffer U5A and
amplifier U7B whose gain is controlled by FWD PWR METER ADJ potentiome-
ter R42. R42 is adjusted for U7B to provide enough voltage for a 100% reading
on the front panel RF POWER meter PC3DS9/10/11 when the Exciter is pro-
viding its proper output power. This voltage is supplied to the meter through
J10-15, PC3J1-15, squaring circuit PC3U2 and amplifier PC3U1.
