SC9-TOCCATA • CompactPCI® Serial CPU Board • 11th Generation Intel® Processors
PCI Express®
The SC9-TOCCATA is mainly based on PCI Express® (PCIe®) technology for on-board
communication, CompactPCI® Serial backplane support, and mezzanine I/O expansion.
Twenty PCI Express® lanes are provided by the Tiger Lake H processor, organized as two links x8
for the two backplane fat pipe slots defined by CompactPCI® Serial. Another four lanes are wired
to the expansion connector HSE1, as x4 link. All processor originated PCIe® lanes are Gen4 capable
(16GT/s). With respect to the current CompactPCI® Serial specification R2.0, the backplane
connectors are only Gen3 qualified however *. For low profile mezzanine expansion via HSE1, the
Gen4 link can be utilised with a Gen4 M.2 SSD (e.g. S48-SSD low profile mezzanine module).
The RM590E PCH in addition offers several PCIe® Gen3 lanes (8GT/s) with flexible link width.
These are wired to the on-board I226-IT Ethernet controllers, to the HSE2 high speed mezzanine
expansion connector, and to the CompactPCI® Serial backplane connectors.
* The SC9-TOCCANA board design is ready for the coming CompactPCI® Serial specification R3.0,
which complies with PCIe® Gen4/5 over the backplane. As VC1-TOCCATA this CPU card will be
available with other backplane connectors, Gen4 capable.
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