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BIOS Quick Reference  •  CC5-RAVE

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EKF Elektronik GmbH * Philipp-Reis-Str. 4 * D-59065 HAMM (Germany)

Tel. +49 (0)2381/6890-0 * Fax. +49 (0)2381/6890-90 * E-Mail [email protected] * Internet http://www.ekf.de

The UDMA capability is passed to the operating system. The actual data transfer mode however

depends on the drives built in UDMA features and the treatment of the operating system (e.g.

DOS will not be able to activate the UDMA mode). The BIOS itself does not use UDMA during

POST.

Master/Slave Timing Mode

Individually selectable for master and slave, this 3-bit (0-7) parameter controls various access

modes to the drives. Detailed information can be derived from the Intel IDE Programmer’s

Reference Manual at 

http://developer.intel.com/design/chipsets/manuals/298236.htm

.

IORDY Sampling Point

Individually selectable for master and slave, this parameter controls a delay time for the drives

IORDY signal (3-5 clock cycles). Detailed information see above.

Recovery Time

Individually selectable for master and slave, this parameter controls delays to recover from drive

access (1-4 clock cycles). Detailed information see above.

Secondary IDE Port

This port is reserved for the ATA CompactFlash drive on the CC5-RAVE. The options are identical

to the primary IDE port but the UDMA parameter. No IDE slave device is attached. 

Summary of Contents for CompactPCI CC5-RAVE

Page 1: ...BIOS Quick Reference CC5 RAVE CompactPCI FC PGA 370 CPU Document No 2508 Preliminary Edition 2 09 2001...

Page 2: ...Assignment Order 9 Boot Order 9 Configuring Floppy Drive Types 10 Configuring IDE Drive Geometry 10 Miscellaneous Settings 11 Typematic Delay Rate 11 Seek at Boot 11 Show Hit Del 11 Config Box 11 F1...

Page 3: ...www ekf de IDE Configuration Setup Screen 17 Primary IDE Port 17 UDMA66 17 Master Slave Timing Mode 18 IORDY Sampling Point 18 Recovery Time 18 Secondary IDE Port 18 Password Configuration 19 Standard...

Page 4: ...001 2 2 Preliminary Edition Manual reflects BIOS Version 4 3 GS EKF Build 0 94 jj 12 September 2001 Nomenclature Numbers followed by a h or with a 0x prefix represent hexadecimal values Trade Marks So...

Page 5: ...he chipset and other peripheral components During this time POST progress codes are written by the system BIOS to I O port 80H allowing the user to monitor the progress with a suitable emulator equipm...

Page 6: ...underneath the splash screen Once the application begins writing to the screen the splash screen relinquishes control providing a seamless graphical progression for the end user Please contact EKF in...

Page 7: ...n System the user can navigate with the UP and DOWN arrow keys Pressing ENTER opens the selected sub menu screen highlighted option marked with an arrow Within the sub menu screens TAB and ENTER are u...

Page 8: ...the drive types themselves in the Floppy Drive Types and IDE Drive Geometry sections Finally you ll need to configure the boot sequence in the middle of the screen Once these selections have been made...

Page 9: ...ot be used for both A and B The BIOS permits this to allow embedded devices to alias drives but desktop operating systems may not be able to maintain cache coherency with such a mapping in place Boot...

Page 10: ...ction The IDE Drive Types section lets you select the type for each of the four IDE drives None User Physical LBA or CHS User This type allows the user to select the maximum cylinders heads and sector...

Page 11: ...re as short as possible Show Hit Del If this option is active you have the choice to enter the Setup menu during the power on self test To do this press the Del key with monitor keyboard or Ctrl C wit...

Page 12: ...plication or any OEM supplied BIOS extensions have debugging code i e INT 3 instructions remaining then these would invoke the debugger automatically if INT 3 instruct is set to Call Dbg To continue u...

Page 13: ...is option allows to reduce considerably the CPUs power consumption useful for low power applications or when high ambient temperatures can occur If the full processor performance is not needed the CPU...

Page 14: ...he amount of delay inserted after outputting each message to the screen can be controlled by the parameters Normal FastBoot and DbgMode Behaviour after Initializing Expansion ROM This parameter contro...

Page 15: ...tached CC6 ACID needed for KBD As an alternative I O might be redirected to the COM1 or COM2 serial interfaces also requires CC6 ACID super I O board Attach a VT100 like ASCII terminal or PC equipped...

Page 16: ...udes Level 1 and 2 Parallel Port Configuration The parallel port can be configured by several parameters If disabled the settings of the remaining parameters have no meaning If enabled the parallel po...

Page 17: ...m will detect attached drives at the Primary IDE interface as Ultra ATA 66 You will have to distinct between two hardware configurations 1 The CC5 RAVE comes without the super I O companion board CC6...

Page 18: ...parameter controls various access modes to the drives Detailed information can be derived from the Intel IDE Programmer s Reference Manual at http developer intel com design chipsets manuals 298236 ht...

Page 19: ...cific key If you can t remember the password there are two possible solutions to this problem Either enter the debug mode the integrated debugger can be invoked prior to entering the unknown password...

Page 20: ...enable the Tests Begin on ESC option to cause the system test suite to be invoked To repeat the system test battery continuously you should also enable the Continuous Testing option When continuous t...

Page 21: ...mand which instructs the debugger to go EB43DBG G ENTER The debugger can be a valuable tool to aid the board bringup process on new designs similar to the evaluation board It supports a DOS SYMDEB sty...

Page 22: ...system can operate either with a standard PC AT or PS 2 keyboard and VGA video monitor or with a special emulation of a console over an RS232 cable connected to a host computer running a terminal pro...

Page 23: ...TESTTIMER 14h Start timer tests POST_STATUS_TESTTIMER2 15h Test 8254 T2 for speaker port B POST_STATUS_TESTTIMER1 16h Test 8254 T1 for refresh POST_STATUS_TESTTIMER0 17h Test 8254 T0 for 18 2Hz POST_S...

Page 24: ...TESTDMA1BASE 62h Test DMA1 base register POST_STATUS_CHECKSEG40E 63h Checking ROM BIOS data area again POST_STATUS_CHECKSEG40F 64h Checking ROM BIOS data area again POST_STATUS_PROGDMA 65h Program DMA...

Page 25: ...signals output to the floppy drive LED to identify the source of the error The following is a comprehensive list of POST beep blink codes for the system BIOS BIOS extensions such as VGA ROMs and SCSI...

Page 26: ...BIOS Quick Reference CC5 RAVE EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Internet http www ekf de Fax 49 0 2381 6890 90 Tel 49 0 2381 6890 0 E Mail sales ekf de...

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