EDT, Inc.
2019 April 29
30
VisionLink F-series
Appendix B: Diagrams
–
Boards and Cabling
Appendix B: Diagrams
–
Boards and Cabling
This section shows diagrams and key features of VisionLink frame grabbers and cables.
VisionLink F-Series Frame Grabbers
F1 and F4
VisionLink F1
FPGA boot select
Normal
Protected
optional
Lemo with adapter
Quad
LED
10
8
6
4
2
9
7
6
3
1
Test points
optional
secondary
SDR26
1
Triggering pins
DVAL
LVAL
FVAL
PCLK
primary
SDR26
0
= pin
= hole
Not to scale;
bold
= default.
optional
DDR3
VisionLink F4
FPGA boot select
Normal
Protected
optional
Lemo with adapter
Quad
LED
10
8
6
4
2
9
7
6
3
1
Test points
secondary
SDR26
1
Triggering pins
DVAL
LVAL
FVAL
PCLK
primary
SDR26
0
= pin
= hole
Not to scale;
bold
= default.
DDR3
