P5SD-B
User’s Manual
4:
Reference Information – 4.4
P5SD-B Rev.1.1 CPU Jumper Settings
Function
Settings
JP1, 2, 3
Ext. Clk AGP
PCI
JP1
JP2
JP3
External
60
60
30
2-3
2-3
2-3
Clock
66.8
66.8
33.4
1-2
2-3
2-3
68.5
68.5
34.3
2-3
2-3
1-2
75
64
32
2-3
1-2
2-3
75
75
37.5
1-2
2-3
1-2
83.3
66.6
33.3
1-2
1-2
2-3
90
60
30
2-3
1-2
1-2
100
66.6
33.3
1-2
1-2
1-2
Note: The external clock setting also sets the AGP and PCI bus clocks
JP10, 11, 12
Clk. Factor
JP10
JP11
JP12
Internal
1.5/3.5 X*
1-2
1-2
Clock Factor
2.0 X
2-3
1-2
2.5 X
2-3
2-3
3.0 X
1-2
2-3
4.0 X
2-3
1-2
2-3
4.5 X
2-3
2-3
2-3
5.0 X
1-2
2-3
2-3
JP14
1-2
3-4
5-6
7-8
9-10
CPU Core Voltage
1.8V
On
On
On
2.0V
On
On
On
On
2.2V
On
2.5V
On
On
2.8V
On
2.9V
On
On
3.1V
On
On
On
3.3V
On
On
On
3.5V
On
On
On
On
On= Jumper cap on, space in table is blank if no cap on
CPU I/O
JP13
STD 3.3V
5-6
[D]
Voltage (Vio)
VRE 3.5V
3-4