Digilent XC7Z020-1CLG400C Reference Manual Download Page 6

Zybo Z7 Board Reference Manual 

 

 

Copyright Digilent, Inc. All rights reserved. 

Other product and company names mentioned may be trademarks of their respective owners.

 

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Note that due to the smaller FPGA in the Zynq-7010, it is not very well suited to be used in SDSoC for embedded 
vision applications. We recommend people purchase the Zybo Z7-20 if they are interested in these types of 
applications. 

 

Software Support 

The Zybo Z7 is fully compatible with Xilinx’s high

-performance Vivado ® Design Suite. This tool set melds FPGA logic 

design and embedded ARM software development into an easy to use, intuitive design flow. It can be used for 
designing systems of any complexity, from a complete operating system running multiple server applications, 
down to a simple bare-metal program that controls some LEDs. It is also possible to treat the Zynq AP SoC as a 
standalone FPGA for those not interested in using the processor in their design. The Zybo Z7 is supported under 

Vivado's free WebPACK™ li

cense, which means the software is completely free to use, including the Logic Analyzer 

and High-level Synthesis (HLS) features. The Logic Analyzer assists with debugging logic that is running in hardware, 
and the HLS tool allows you to compile C code directly into HDL. 

Design resources, example projects, and tutorials are available for download at the 

Zybo Z7 Resource Center

Zynq platforms are well-suited to be embedded Linux targets, and Zybo Z7 is no exception. Digilent currently does 
not provide a Petalinux example for this product, however one will be available in the near future on the Zybo Z7 
Resource Center. 

The Zybo Z7 can also be used in Xilinx's SDSoC environment, which allows you to design FPGA accelerated 
programs and video pipelines with ease in an entirely C/C++ environment. For more information on SDSoC, see 
the 

Xilinx SDSoC Site

. Digilent will be releasing a video capable platform with Linux and OpenCV support in the near 

future. Note that due to the smaller FPGA in the Zybo Z7-10, only very basic video processing demos will be 
included with that platform. Digilent recommends the Zybo Z7-20 for those interested in video processing. 

Those familiar with the older Xilinx ISE/EDK toolsets from before Vivado was released can also choose to use the 
Zybo Z7 in that tool set. Digilent does not provide materials to support this, but you can always ask for help on 
the 

Digilent Forum

 

Zynq APSoC Architecture 

The Zynq APSoC is divided into two distinct subsystems: The Processing System (PS) and the Programmable Logic 
(PL). The figure below shows an overview of the Zynq APSoC architecture, with the PS colored light green and the 
PL in yellow. Note that the PCIe Gen2 controller and Multi-gigabit transceivers are not available on the Zynq-7020 
or Zynq-7010 devices. 

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Summary of Contents for XC7Z020-1CLG400C

Page 1: ...their respective owners Page 1 of 31 Table of Contents Overview 3 Purchasing Options 5 Software Support 6 Zynq APSoC Architecture 6 Functional Description 9 1 Power Supplies 9 1 1 Power Input Sources...

Page 2: ...mmable Logic Reset 16 6 3 Processor Subsystem Reset 16 7 USB UART Bridge Serial Port 17 8 microSD Slot 17 9 USB Host OTG 19 10 Ethernet 19 11 HDMI 21 11 1 TMDS Signals 22 11 2 Auxiliary signals 22 12...

Page 3: ...Z7 adds several features and performance improvements To assist in migrating from the Zybo to the Zybo Z7 Digilent has created a migration guide available on the Zybo Z7 Resource Center Memory 1 GB D...

Page 4: ...ost OTG port 22 HDMI output port 7 USB Host power enable jumper 23 Ethernet port 8 Standard Pmod port 24 External power supply connector 9 User switches 25 Fan connector 5V three wire 10 User LEDs 26...

Page 5: ...0 are not available on the Zybo Z7 10 The differences between the two variants are summarized below Product Variant Zybo Z7 10 Zybo Z7 20 Zynq Part XC7Z010 1CLG400C XC7Z020 1CLG400C 1 MSPS On chip ADC...

Page 6: ...enter Zynq platforms are well suited to be embedded Linux targets and Zybo Z7 is no exception Digilent currently does not provide a Petalinux example for this product however one will be available in...

Page 7: ...eripheral controllers are connected to the processors as slaves via the AMBA interconnect and contain readable writable control registers that are addressable in the processors memory space The progra...

Page 8: ...3 12 JF4 13 JF1 14 JF9 15 JF10 MIO 501 1 8V Peripherals Pin ENET 0 USB 0 SDIO 0 16 TXCK 17 TXD0 18 TXD1 19 TXD2 20 TXD3 21 TXCTL 22 RXCK 23 RXD0 24 RXD1 25 RXD2 26 RXD3 27 RXCTL 28 DATA4 29 DIR 30 STP...

Page 9: ...n board power supplies are enabled or disabled by the power switch SW4 The power indicator LED LD13 labeled PGOOD is on when all the supply rails reach their nominal voltage 1 1 Power Input Sources Th...

Page 10: ...rent draws Even when attached to a host capable of providing more current the Zybo Z7 will limit itself to 75 A and will reset if this current is reached If you experience your project resetting indic...

Page 11: ...signal will assert enabling the 3 3V audio supply lighting up the power LED LD13 and de asserting the Power On Reset signal PS_POR_B of the Zynq Each power supply uses a soft start ramp of 1 10ms to l...

Page 12: ...e mode register to the 256 KB of internal RAM within the APU called On Chip Memory or OCM The FSBL must be wrapped up in a Zynq Boot Image in order for the BootROM to properly copy it The last thing t...

Page 13: ...h that the Zynq can boot from Documentation available from Xilinx describes how to use Xilinx SDK to program a Zynq Boot Image into a Flash device attached to the Zynq Once the Quad SPI Flash has been...

Page 14: ...groups were swapped as well These changes are transparent to the user During the whole design process the Xilinx PCB guidelines were followed Both the memory chips and the PS DDR bank are powered fro...

Page 15: ...n on this see section 10 Ethernet The OTP region also includes a factory programmed read only 128 bit random number The very lowest address range 0x00 0x0F can be read to access the random number See...

Page 16: ...ng sections 6 1 Power on Reset The Zynq PS supports external power on reset signals The power on reset is the master reset of the entire chip This signal resets every register in the device capable of...

Page 17: ...smit LED LD11 and the receive LED LD10 Signal names that imply direction are from the point of view of the DTE Data Terminal Equipment in this case the PC The FT2232HQ is also used as the controller f...

Page 18: ...rd files available on the Zybo Z7 resource center Figure 8 1 microSD slot signals Both low speed and high speed cards are supported the maximum clock frequency being 50 MHz A Class 4 card or better is...

Page 19: ...de 500 mA on the 5V VBUS line Note that loading C71 may cause the Zybo Z7 to reset when booting embedded Linux while powered from the USB port regardless of if any USB device is connected to the host...

Page 20: ...ard files Although the default power up configuration of the PHY might be enough in most applications the MDIO bus is available for management The RTL8211E VL is assigned the 5 bit address 00001 on th...

Page 21: ...DMI multiplexer configured as a simple switch This device is used to prevent displays from back powering the Zybo Z7 and otherwise has no effect on functionality The benefit this adds is to make it po...

Page 22: ...le and what resolutions are supported Only afterwards will video transmission begin Refer to VESA E DDC specifications for more information The Consumer Electronics Control or CEC is an optional proto...

Page 23: ...is specified in Table 12 2 When configured as master the direction of BCLK PBLRC and RECLRC is inverted In this mode the codec generates the proper frequencies for these clocks No matter where the clo...

Page 24: ...high output only when they are pressed Slide switches generate constant high or low inputs depending on their position Figure 13 1 Zybo Z7 GPIO The high efficiency LEDs are anode connected to the Zynq...

Page 25: ...to the space between the heat sink fins the heat sink does not contain mounting holes The fan must be attached with the label facing down towards the Zynq device in order to push the air flow in the c...

Page 26: ...15 Pcam Port The Pcam port included on the Zybo Z7 is a 15 pin 1 mm pitch zero insertion force ZIF connector designed specifically for attaching camera sensor modules to host systems The Pcam connect...

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Page 28: ...xible flat cable FFC To connect the cable to the Zybo Z7 follow these instruction Fig 15 2 depicts each step 1 Locate the Pcam connector between the two HDMI ports 2 Pull directly up on the off white...

Page 29: ...large collection of Pmod accessory boards that can attach to the Pmod ports to add ready made functions like A D s D A s motor drivers sensors and other functions See digilentinc com for more informa...

Page 30: ...de the regular VCCO dependent limits apply See Xilinx datasheets for more information The Dual Analog Digital Pmod on the Zybo Z7 differs from the rest in the routing of its traces The eight data sign...

Page 31: ...talk In applications where this is a concern the standard Pmod port should be used Another option would be to ground one of the signals and use its pair for the signal ended signal Since the High Spee...

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