Altair Bus Signals
Pin
Signal
Description
Pin
Signal
Description
1
+8v
51
+8v
2
+18v
52
-18v
3
XRDY
Another RDY signal OR'd to 8080
53
SSWDSB* Direct sense switch input to the processor
4
VI0*
Vectored interrupts 0-7
54
EXTCLR*
Return all slave boards to known state
5
VI1*
55
RTC
60hz for Real-Time Clock
6
VI2*
56
STSTB*
Status strobe
7
VI3*
57
DIG1
Data input gate 1 (for 8800b front panel)
8
VI4*
58
FRDY
8800b Front panel RDY to 8080
9
VI5*
59
10
VI6*
60
11
VI7*
61
12
62
13
63
14
64
15
65
16
66
17
67
PHANT*
Not used in Altair
18
SDSB*
Status disable (sMEMR, sWO, sM1, sINP, sOUT, sHLTA)
68
MWRT
Memory Write (pWR* asserted and not SOUT)
19
CDSB*
Control disable (pSYNC, pSTVAL, pDBIN, pWR, pHLDA)
69
PS*
Memory protect status (out from addressed card)
20
UNPROT
Front panel memory unprotect operation
70
PROT
Front panel memory protect operation
21
SS
Front panel single-step
71
RUN
Machine is in the RUN state
22
ADSB*
Address bus disable (A15-A0)
72
pRDY
RDY signal OR'd with others to 8080
23
DODSB*
Data Out bus disable (DO7-DO0)
73
pINT*
Interrupt request to 8080
24
PHI2
Phase 2 clock
74
pHOLD*
Hold request to 8080
25
PHI1
Phase 1 clock
75
pRESET*
Reset line from from front panel reset switch
26
pHLDA
8080 hold acknowledge output
76
pSYNC
8080 start of machine cycle
27
pWAIT
8080 wait acknowledge output
77
pWR*
8080 write data valid
28
pINTE
Asserted when the 8080 has interrupts enabled
78
pDBIN
8080 reading data bus
29
A5
79
A0
30
A4
80
A1
31
A3
81
A2
32
A15
82
A6
33
A12
83
A7
34
A9
84
A8
35
DO1
85
A13
36
DO0
86
A14
37
A10
87
A11
38
DO4
88
DO2
39
DO5
89
DO3
40
DO6
90
DO7
41
DI2
91
DI4
42
DI3
92
DI5
43
DI7
93
DI6
44
sM1
Machine cycle #1 (instruction fetch)
94
DI1
45
sOUT
Write cycle for an OUT instruction taking place
95
DI0
46
sINP
Read cycle for an IN instruction taking place
96
sINTA
Bus cycle is interrupt acknowledge
47
sMEMR
Read cycle is a memory read
97
sWO*
Bus cycle is a write (memory or I/O)
48
sHLTA
8080 halt acknowledge output
98
sSTACK
Bus cycle is a stack operation
49
CLOCK*
99
POC*
Power on clear
50
GND
100
GND
Ground in IEEE-696 bus spec