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Altair Bus Signals

Pin

Signal

Description

Pin

Signal

Description

1

 +8v

51

 +8v

2

 +18v 

52

 -18v

3

XRDY

 Another RDY signal OR'd to 8080

53

SSWDSB*  Direct sense switch input to the processor

4

VI0*

 Vectored interrupts 0-7

54

EXTCLR*

 Return all slave boards to known state

5

VI1*

55

RTC

 60hz for Real-Time Clock

6

VI2*

56

STSTB*

 Status strobe

7

VI3*

57

DIG1

 Data input gate 1 (for 8800b front panel)

8

VI4*

58

FRDY

 8800b Front panel RDY to 8080

9

VI5*

59

10

VI6*

60

11

VI7*

61

12

62

13

63

14

64

15

65

16

66

17

67

PHANT*

 Not used in Altair

18

SDSB*

 Status disable (sMEMR, sWO, sM1, sINP, sOUT, sHLTA)

68

MWRT

 Memory Write (pWR* asserted and not SOUT)

19

CDSB*

 Control disable (pSYNC, pSTVAL, pDBIN, pWR, pHLDA)

69

PS*

 Memory protect status (out from addressed card)

20

UNPROT

 Front panel memory unprotect operation

70

PROT

 Front panel memory protect operation

21

SS

 Front panel single-step

71

RUN

 Machine is in the RUN state

22

ADSB*

 Address bus disable (A15-A0)

72

pRDY

 RDY signal OR'd with others to 8080

23

DODSB*

 Data Out bus disable (DO7-DO0)

73

pINT*

 Interrupt request to 8080

24

PHI2

 Phase 2 clock

74

pHOLD*

 Hold request to 8080

25

PHI1

 Phase 1 clock

75

pRESET*

 Reset line from from front panel reset switch

26

pHLDA

 8080 hold acknowledge output

76

pSYNC

 8080 start of machine cycle

27

pWAIT

 8080 wait acknowledge output

77

pWR*

 8080 write data valid

28

pINTE

 Asserted when the 8080 has interrupts enabled

78

pDBIN

 8080 reading data bus

29

A5

79

A0

30

A4

80

A1

31

A3

81

A2

32

A15

82

A6

33

A12

83

A7

34

A9

84

A8

35

DO1

85

A13

36

DO0

86

A14

37

A10

87

A11

38

DO4

88

DO2

39

DO5

89

DO3

40

DO6

90

DO7

41

DI2

91

DI4

42

DI3

92

DI5

43

DI7

93

DI6

44

sM1

 Machine cycle #1 (instruction fetch)

94

DI1

45

sOUT

 Write cycle for an OUT instruction taking place

95

DI0

46

sINP

 Read cycle for an IN instruction taking place

96

sINTA

 Bus cycle is interrupt acknowledge

47

sMEMR

 Read cycle is a memory read

97

sWO*

 Bus cycle is a write (memory or I/O)

48

sHLTA

 8080 halt acknowledge output

98

sSTACK

 Bus cycle is a stack operation

49

CLOCK*

99

POC*

 Power on clear

50

GND

100

GND

Ground in IEEE-696 bus spec

Summary of Contents for Altair 8800c

Page 1: ...ed and like the original front panel board finding an original cabinet by itself is nearly impossible As an alternative the cab inet for the Altair 8800 Clone is still available however the original f...

Page 2: ...us should drive the PRDY signal with an open collector driver The signal is terminated on the CPU board with a 1K pull up resistor However the original front panel board actively drives this signal hi...

Page 3: ...APEM 5236AB Search for best deal S10 S25 Toggle Switch On None On Gold APEM 5236CDB Search for best deal S2 S9 Toggle Switch On Off On Gold APEM 5237CDB Search for best deal Switches If at all possibl...

Page 4: ...the PCB looks a bit different than the 8800c front panel board Ignore the LED orientation polarity shown in the pictures 1 Prop the front panel bracket an inch or two above your work surface and orien...

Page 5: ...rd level and square on the switches The next step is to install the front panel LEDs In order to hold the LEDs at the proper and consistent height above the board use the front dress panel as a jig Do...

Page 6: ...fy that the front panel and PCB look perfectly parallel to each other and are resting directly on all of the white spacers See the pictures on the next page 6 Solder the LEDs Press down gently on the...

Page 7: ...eying slot before soldering the connector onto the board Again the connector goes on the back side of the board J2 Though not a requirement I d recommend pulling the center pin out of the J2 connector...

Page 8: ...anel firmly around a few of the switches to free those spots where the support bracket may be caught on the switch threads 2 Install a lock washer and nut finger tighten only on the power switch all e...

Page 9: ...nd wiched the spacers 3 Work the front panel down around the switch bushings as needed until the front panel is flat and even over all 25 switches When properly assembled the bushings generally protru...

Page 10: ...des approximately equal as you work the panel backwards into place where the mounting bracket s threaded holes line up with the four holes in the bottom of the case 2 Attach the front panel support br...

Page 11: ...Input NAND 595 SN74LS30N Mouser IC C 74LS164 Parallel Out Shift Register 595 SN74LS164N Mouser IC D I 74LS374 Octal Latch 595 SN74LS374N Mouser IC E F 74LS109 Dual J K Flip Flop 595 SN74LS109AN Mouser...

Page 12: ...required J1 Cable Assembly A 50 pin ribbon cable connects the front panel board to the interface board in the bus One way to route this cable is shown in the picture below Here the cable exits towards...

Page 13: ...th plated mounting holes that are connected to DC ground may make this connection to chassis ground for you as well If putting screws through pre drilled holes in the cabinet paint may prevent electri...

Page 14: ...MSB of Power On Jump Address zero disables VDIP 3 MSB of Reset Jump Address zero disables Power On Reset By default and to behave like the original Altair 8800 front panel the run state of the 8800c...

Page 15: ...ippet on switches A7 A0 see below and then depressing AUX Left After injection an examine of the start address is automatically performed so simply depressing run starts the loaded code The code injec...

Page 16: ...lls so the lower num ber wins See http deramp com downloads altair software miscellaneous Intel Hex Loader Loads an Intel hex file through the chosen 2SIO serial port The program is relocatable Set sw...

Page 17: ...pecified address if the computer is running Note that if the computer is not running when RESET is actuated or a STOP RESET is performed this has the effect of examining the auto jump address upon res...

Page 18: ...uld appear on the terminal emulator window Follow the prompt to send the hex file that contains the firmware update from the PC Once the hex file is received the update is automatically programmed int...

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Page 24: ...Pulse high to latch shift register parallel outputs into the CPU inject latch B5 12 smUNPROT Low to assert bus UNPROT signal memory unprotect B4 13 smSEROUT Serial data output to shift register to up...

Page 25: ...7 SERIN 8 N C 9 N C 10 WAIT 11 HLDA 12 A15 13 A14 14 A13 15 A12 16 A11 17 A10 18 A9 19 A8 20 A7 21 A6 22 A5 23 A4 24 A3 25 A2 26 A1 27 A0 28 N C 29 Gnd 30 Gnd 31 Gnd 32 Gnd 33 INTE 34 PROT 35 MEMR 36...

Page 26: ...AND 1 1 K 1 3 of K used 74LS30 Single 8 Input NAND 1 1 B 74LS04 Hex Inverter 5 1 M 5 6 of M used 74LS368 Hex Bus Driver 6 1 N 74LS109 Dual J K Flip Flop 4 2 E F 74LS374 Octal Latch 2 2 D I 74LS244 Oct...

Page 27: ...72 pRDY RDY signal OR d with others to 8080 23 DODSB Data Out bus disable DO7 DO0 73 pINT Interrupt request to 8080 24 PHI2 Phase 2 clock 74 pHOLD Hold request to 8080 25 PHI1 Phase 1 clock 75 pRESET...

Page 28: ...the case 4 Remove the front dress panel from the unpainted support bracket by removing the six nuts from the back side of the support bracket Remove and save all hardware including the six white spac...

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