Pin
Name
Function
Channel
25
C1S1O
Stage 1 output
1
26
C1S2O
Stage 2 output
1
27
C1S2I
Stage 2 input
1
28
C1S2PCK
Stage 2 PWM clock input
1
29
C1P5
5 V
1
30
C1N5
-5 V
1
31
C1N5D
-5 V dig
1
32
C1S1MCKB
Stage 1 master clock bar input
1
33
C1S2MCKB
Stage 2 master clock bar input
1
34
C1P5D
5 V digital
1
35
C1GND
Ground
1
36
C0GND
Ground
0
37
C0P5D
5 V digital
0
38
C0S2MCK
Stage 2 master clock input
0
39
C0S1MCK
Stage 1 master clock input
0
40
C0N5D
-5 V digital
0
Bottom Tab
-
Connect to Pins 1 and 30
0,1
Table 2.2: CSRA6600 Device Terminal Functions
Production Information
© 2012 Cambridge Silicon Radio Limited
This material is subject to CSR's non-disclosure agreement.
Page 26 of 181
CS-225959-DSP6
www.csr.com
CSRA6600
/
CSRA
6601
Direct Digital Feedback
A
m
plifier
Data Sheet
68
