22
AVR-2802/982
TC9273N-004 (AU: IC108)
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
V
DD
STB
DATA
S2
S3
S4
S5
S6
S7
S8
S9
S10
GND
CK
Vss
S1
13
14
1
3
4
5
6
7
8
9
10
11
12
2
15
16
28
27
26
25
24
23
22
21
20
19
18
17
1
13
28
2~12
12~27
14
15
16
Vss
GND
V
DD
S1~S10
CK
DATA
STB
GND=0V
Vss=-8.0~-17V
GND=0V
Border Input
Pin No Symbol
Name
Function
Dual Power Use:VDD = 8.0~17 V
Single Power Use:VDD = 8.0~18V
+Power Terminal
Digital Ground
+Power Terminal
I/O Terminal
Clock Input
Low level
Terminal
Clock input for data transfer.
Serial input for switch setting.
Strobe InputStrobe input for data writing.
Strobe Input
Data Input
Input terminal of analog switch.
TC9273N Terminal Function
NJM2229S (AU: IC452)
3
2
4
6
7
8
9
10
11
12
13
14
1
15
16
5
1
16
Sync Sepa
Sync Det
Phase
Det
Vsync Sepa
32fH
VCO
1/32
AD1854 (AU: IC601)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DGND
MCLK
CLATCH
CCLK
CDATA
384/256
X2MCLK
ZEROR
DEEMP
96/48
AGND
OUTR+
OUTR
−
FILTR
DVDD
SDATA
BCLK
L/RCLK
PD/RST
MUTE
ZEROL
IDPM0
IDPM1
FILTB
AVDD
OUTL+
OUTL
−
AGND
FRONT VIEW
Name
Function
Terminal Function
No.
1
DGND
I
Digital Ground.
2
MCLK
I
Master Clock Input
3
CLATCH
I
Latch input for control data
4
CCLK
I
Control clock input for control data
5
CDATA
I
Serial control input
6
384/256
I
Selects the master clock mode
7
X2MCLK
I
Selects internal clock doubler (LO) or internal clock=MCLK (HI)
8
ZEROR
O
Right Channel Zero Flag Output
9
DEEMP
I
De-Emphasis
10
96/48
I
Selects 48kHz (LO) or 96kHz Sample Frequency Control
11,15 AGND
I
Analog Ground
12
OUTR+
O
Right Channel Positive line level analog output
13
OUTR-
O
Right Channel Negative line level analog output
14
FILTR
O
Voltage Reference Filter Capacitor Connection
16
OUTL-
O
Left Channel Negative line level analog output
17
OUTL+
O
Left Channel Positive line level analog output
18
AVDD
I
Analog Power supply
19
FILTB
O
Filter Capacitor connection
20
IDPM1
I
Input serial data port mode control one
21
IDPM0
I
Input serial data port mode control zero
22
ZEROL
O
Left Channel Zero Flag output
23
MUTE
I
Mute. Assert HI to mute both stereo analog output
24
PD/RST
I
Power-Down/Reset
25
L/R CLK
I
Left/Right clock input for input data
26
BCLK
I
Bit clock input for input data
27
SDATA
I
Serial input
28
DVDD
I
Digital Power Supply
I/O
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Summary of Contents for AVR-2802
Page 62: ...SCHEMATIC DIAGRAMS 1 12 1 2 3 4 5 6 All manuals and user guides at all guides com ...
Page 63: ... 12V AVR 2802 982 6 7 8 9 10 11 A B C D All manuals and user guides at all guides com ...
Page 68: ... 2 5V SCHEMATIC DIAGRAMS 2 12 1 2 3 4 5 6 All manuals and user guides at all guides com ...
Page 69: ... 5V 5V 5V AVR 2802 982 6 7 8 9 10 11 A B C D All manuals and user guides at all guides com ...
Page 74: ...All manuals and user guides at all guides com ...
