18
AVR-2802/982
LC89055W (AU: IC800)
Pin Name
Function
LC89055W Terminal Function
Pin
No.
1
DISEL
I
Data input terminal (select input pin of DIN0, DIN1)
2
DOUT
O
Input bi-phase data through output terminal
3
DIN0
I
Amp built-in coaxial/optical input correspond data input terminal
4
DIN1
I
Amp built-in coaxial/optical input correspond data input terminal
5
DIN2
I
Optical input correspond data input terminal
6
DGND
Digital GND
7
DVDD
Digital power supply
8
R
I
VCO gain control input terminal
9
VIN
I
VCO free-run frequency setting input terminal
10
LPF
O
PLL loop filter setting terminal
11
AVDD
Analog power supply
12
AGND
Analog GND
13
CKOUT
O
Clock output terminal (256fs, 384fs, 512fs, X
′
tal osc., VCO free-run osc.)
14
BCK
O
64fs clock output terminal
15
LRCK
O
fs clock output terminal (L: Rch, H: Lch, I
2
S: Reverse)
16
DATAO
O
Data output terminal
17
XSTATE
O
Input data detecting result output terminal
18
DGND
Digital GND
19
DVDD
Digital power supply
20
XMCK
O
X
′
tal osc. clock output terminal (24.576MHz or 12.288MHz)
21
XOUT
O
X
′
tal osc. connection output terminal
22
XIN
I
X
′
tal osc. connection input terminal, external signal input possible (24.576MHz or 12.288MHz)
23
EMPHA
O
Emphasis information output terminal of channel status
24
AUDIO
O
Bit1 output terminal of channel status
25
CSFLAG
O
Top 40bit revise flag output terminal of channel status
26
F0/P0/C0
O
Input fs cal. sig. out / data type out / input word inf. output terminal
27
F1/P1/C1
O
Input fs cal. sig. out / data type out / input word inf. output terminal
28
F2/P2/C2
O
Input fs cal. sig. out / data type out / input word inf. output terminal
29
VF/P3/C3
O
Validity flag out / data type out / input word inf. output terminal
30
DVDD
Digital power supply
31
DGND
Digital GND
32
AUTO
O
Non PCM burst data transfer detect sig. output terminal
33
BPSYNC
O
Non PCM burst data preamble Pa, Pb, Pc, Pd sync sig. output terminal
34
ERROR
O
PLL lock error, data error flag output terminal
35
DO
O
CPU I/F read data output terminal
36
DI
I
CPU I/F write data input terminal
37
CE
I
CPU I/F chip enable input terminal
38
CL
I
CPU I/F clock input terminal
39
XSEL
I
Frequency select input pin of XIN X
′
tal osc. (24.576MHz or 12.288MHz)
40
MODE0
I
Mode setting input terminal
41
MODE1
I
Mode setting input terminal
42
DGND
Digital GND
43
DVDD
Digital power supply
44
DOSEL0
I
Data output format select input terminal
45
DOSEL1
I
Data output format select input terminal
46
CKSEL0
I
Output clock select input terminal
47
CKSEL1
I
Output clock select input terminal
48
XMODE
I
Reset input terminal
I/O
* For latch-up countermeasure, set digital (DVDD) and analog (AVDD) power on/off in the same timing.
D
IS
E
L
D
O
U
T
D
IN
0
D
IN
1
D
IN
2
D
G
N
D
D
V
D
D
R
V
IN
L
P
F
A
V
D
D
A
G
N
D
A U D I O
E M P H A
X I N
X O U T
X M C K
D V D D
D G N D
X S T A T E
D A T A 0
L R C K
B C K
C K O U T
C E
C L
X S E L
M O D E 0
M O D E 1
D G N D
D V D D
D O S E L 0
D O S E L 1
C K S E L 0
C K S E L 1
X M O D E
D
I
D
O
E
R
R
O
R
B
P
S
Y
N
C
A
U
T
O
D
G
N
D
D
V
D
D
V
F
/P
3
/C
3
F
2
/P
2
/C
2
F
1
/P
1
/C
1
F
0
/P
0
/C
0
C
S
F
L
A
G
All manuals and user guides at all-guides.com
Summary of Contents for AVR-2802
Page 62: ...SCHEMATIC DIAGRAMS 1 12 1 2 3 4 5 6 All manuals and user guides at all guides com ...
Page 63: ... 12V AVR 2802 982 6 7 8 9 10 11 A B C D All manuals and user guides at all guides com ...
Page 68: ... 2 5V SCHEMATIC DIAGRAMS 2 12 1 2 3 4 5 6 All manuals and user guides at all guides com ...
Page 69: ... 5V 5V 5V AVR 2802 982 6 7 8 9 10 11 A B C D All manuals and user guides at all guides com ...
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