Denon AVR-1712, Service Manual

Page: 124 / 161

124
LC89058W-E (HDMI : IC21)
Pin Functions
n o it c n u F O /I e m a N . o N n i P
1 RXOUT1 O RX0-6 input S/PDIF through output pin 1
2 RX0 I
5
(pd) 5V withstand voltage TTL input level compatible S/PDIF input pin (connected to GND when RX1 is set)
3 RX1 I(pd) Co-axial compatible S/PDIF input pin (supported demodulation sampling frequency of up to 96kHz)
4 RX2 I
5
(pd) 5V withstand voltage TTL input level compatible S/PDIF input pin (connected to GND when RX1 is set)
5 RX3 I
5
(pd) 5V withstand voltage TTL input level compatible S/PDIF input pin
6 DGND Digital GND
7 DVDD Digital power supply (3.3V)
8 RX4 I
5
(pd) 5V tolerable TTL input level compatible S/PDIF input pin
9 RX5 I
5
(pd) 5V tolerable TTL input level compatible S/PDIF input pin
10 RX6 I
5
(pd) 5V tolerable TTL input level compatible S/PDIF input pin
11 DVDD Digital power supply (3.3V)
12 DGND Digital GND
13 LPF O PLL loop filter connection pin
14 AVDD Analog power supply (3.3V)
15 AGND Analog GND
16 RMCK O R system clock output pin (VCO, 512fs, XIN)
17 RBCK O/I R system bit clock I/O pin (64fs)
18 DGND Digital GND
19 DVDD Digital power supply (3.3V)
20 RLRCK O/I R system LR clock I/O pin (fs)
21 RDATA O
Serial audio data output pin
22 SBCK O
S system bit clock output pin (16fs, 32fs, 64fs, 128fs)
23 SLRCK O
S system LR clock output pin (fs/4, fs/2, fs, 2fs)
24 SDIN I
5
External serial audio data input pin
M
OU
T
39
38
37
DI
RERR
SLRCK
SDIN
DO
36
42
41
40
45
44
43
48
47
46
CL
CE
DGND
XMODE
GPIO0
DVDD
GPIO2
GPIO1
RXOUT2
GPIO3
IN
T
35
CKST
34
A
UDI
O
33 32 31
LC89058W-E
DV
DD
30
XIN
29
D
G
N
D
28 27
DV
DD
26
DV
DD
D
G
N
D
D
G
N
D
25
XO
UT
XMC
K
23
24
2 1
RDATA
SBCK
DVDD
RLRCK
RBCK
DGND
AGND
RMCK
LPF
AVDD
*
RX
5
*
RX
6
DV
DD
*
RX
4
*
RX
3
D
G
N
D
*
RX
1
*
RX
2
RXO
U
T1
*
RX
0
4 3 6 5 8 7 10 9 12 11
21
22
19
20
17
18
15
16
13
14
* : Pull-down resistor internal at no selection