Denon AVR-1712, Service Manual

Page: 123 / 161

123
ADV7623 Block diagram
CH0
CH1
CH2
VIDEO DATA
DE
VS
HS
AUDIO DATA
VIDEO DATA
DE
VS
HS
AUDIO DATA
VIDEO DATA
DE
VS
HS
AUDIO DATA
VIDEO DATA
DE
VS
HS
AUDIO DATA
XTAL
XTAL1
RXA_C
RXB_C
RXC_C
RXD_C
RXA_0
RXA_1
RXA_2
VI
D
EO
/A
UD
IO
C
LO
C
K
G
EN
ER
A
TI
O
N
RX
PLL
CEC
TXC
TX0
TX1
TX2
5V DETECT
C
O
M
PO
N
EN
T
PR
O
C
ESS
O
R
SCL
SDATA
ALSB
CS
I 2 C
CONTROLLER
PWRDN
RESET
GLOBAL
CONTROLS
DDCA_SDA
DDCA_SCL
DDCB_SDA
DDCB_SCL
DDCC_SDA
DDCC_SCL
DDCD_SDA
DDCD_SCL
AP0_IN
AP1_IN
AP2_IN
AP3_IN
AP4_IN
AP5_IN
SCLK_IN
MCLK_IN
AP0_OUT
AP1_OUT
AP2_OUT
AP3_OUT
AP4_OUT
AP5_OUT
SCLK_OUT
MCLK_OUT
ARC+
RX EDID/
REPEATER
CONTROLLER
RX HPD
CONTROLLER
EP_MISO
EP_MOSI
EP_CS
EP_SCK
SPI MASTER/
SLAVE
EQUALIZER
RXB_0
RXB_1
RXB_2
EQUALIZER
SAMPLER
SAMPLER
RXC_0
RXC_1
RXC_2
EQUALIZER SAMPLER
RXD_0
RXD_1
RXD_2
EQUALIZER
CEC
CONTROLLER
EDID
RAM
SAMPLER
H
D
M
I R
ECE
IVE
R
PR
O
C
ESS
O
R
TRA
N
SM
ITT
ER
PA
CK
ET
B
U
IL
D
ER
H
DC
P
EN
C
R
YP
TI
O
N
EN
G
IN
E
H
D
M
I
EN
C
O
DE
R
SE
R
IA
LI
ZE
R
TM
D
S
D
R
IVE
R
S
INT1
INT2
INT_TX
IN
TE
R
R
U
PT
C
O
N
TR
O
LL
ER
TXDDC_SDA
TXDDC_SCL TX
ED
ID
/H
DC
P
C
O
NT
R
O
LLE
R
ED
ID
/H
DC
P
B
U
FF
ER
HPD_ARC–
TX
H
PD
C
O
N
TR
O
LL
ER
H
DC
P
D
EC
R
YP
TI
O
N
EN
G
IN
E
SYNC
MEASUREMENT
PACKET
PROCESSOR
INFOFRAME
PACKET
MEMORY
AUDIO
PROCESSOR
ARC
RECEIVER
AUDIO
CAPTURE
H
D
C
P
K
EY
S
TX
PLL
ADV7623
5V_DETA
5V_DETB
5V_DETC
5V_DETD
HP_CTRLA
HP_CTRLB
HP_CTRLC
HP_CTRLD
OSD