Chapter 1 Specifications and Wiring
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PCI-DMC-A01 / PCI-DMC-B01
1.5.2 CN1: Input/Output Signal Port (for A01_Ver.1.1 & B01)
Figure 1.7 CN1
Pin definition
GPIO
: General Purpose Input & Output
※
This is the pin definition for PCI-DMC-B01 Ver2.0
On PCI-DMC-A01 Ver1.1 only
Pin 5, Pin 10 and Pin 15
are
valid
Pin
Label
Description
1
QA_1-
QA Signal 1 (-)
2
QB_1-
QB Signal 1 (-)
3
QA_2-
QA Signal 2 (-)
4
QB_2-
QB Signal 2 (-)
5
External GND
GND Signal
6
QA_1+
QA Signal 1 (+)
7
QB_1+
QB Signal 1 (+)
8
QA_2+
QA Signal 2 (+)
9
QB_2+
QB Signal 2 (+)
10
GPIO IN
GPIO Input signal
11
CMP_1+(RS-422) 1
st
RS422 Differential Signal (+)
12
CMP_1- (RS-422)
1
st
RS422 Differential Signal (-)
13
CMP_2+(RS-422) 2
nd
RS422 Differential Signal (+)
14
CMP_2- (RS-422)
2
nd
RS422 Differential Signal (-)
15
GPIO OUT
GPIO Output signal
1.5.3 CN2: DMCNET Expansion Module Connection Port
Figure 1.8 CN2
Pin definition
Pin
Label
Description
1
RS485T_1 (+)
1
st
RS485 Transmission Signal (+)
2
RS485T_1 (-)
1
st
RS485 Transmission Signal (-)
3
RS485T_2 (+)
2
nd
RS485 Transmission Signal (+)
6
RS485T_2 (-)
2
nd
RS485 Transmission Signal (-)
7
EGND
9V Ground Signal
8
EGND
9V Ground Signal
1-6
Revised May, 2012
