Mode-specific guidelines
Four memory channels are allocated to each processor. The allowable configurations depend on the memory mode selected.
Memory optimized independent channel mode
This mode supports Single Device Data Correction (SDDC) only for memory modules that use x4 device width. It does not impose any
specific slot population requirements.
Memory sparing
NOTE:
To use memory sparing, this feature must be enabled in System Setup.
In this mode, one rank per channel is reserved as a spare. If persistent correctable errors are detected on a rank, the data from this rank is
copied to the spare rank, and the failed rank is disabled.
With memory sparing enabled, the system memory available to the operating system is reduced by one rank per channel. For example, in a
dual-processor configuration with sixteen 16 GB single-rank memory modules, the available system memory is: 3/4 (ranks/channel) × 16
(memory modules) × 16 GB = 192 GB, and not 16 (memory modules) × 16 GB = 256 GB.
NOTE:
Memory sparing does not offer protection against a multi-bit uncorrectable error.
NOTE:
Both Advanced ECC/Lockstep and Optimizer modes support memory sparing.
Memory mirroring
Memory mirroring offers the strongest memory module reliability mode, providing improved uncorrectable multi-bit failure protection. In a
mirrored configuration, the total available system memory is one half of the total installed physical memory. Half of the installed memory is
used to mirror the active memory modules. In the event of an uncorrectable error, the system switches over to the mirrored copy. This
ensures Single Device Data Correction (SDDC) and multi-bit protection.
The installation guidelines for memory modules are as follows:
•
Memory modules must be identical in size, speed, and technology.
•
Memory modules must be populated in sets of 6 per CPU to enable memory mirroring.
Table 25. Memory population rules
Processor
Configuration
Memory population
Memory population information
Single CPU
Optimized (Independent channel)
population order
1, 2, 3, 4, 5, 6, 7, 8
Odd amount of DIMMs per CPU
allowed.
Mirroring population order
{1, 2, 3, 4, 5, 6}
Mirroring is supported with 6 DIMMs
per CPU
Single rank sparing population order 1, 2, 3, 4, 5, 6, 7, 8
Populate in this order, odd amount per
CPU allowed. Requires two ranks or
more per channel.
Multi rank spare population order
1, 2, 3, 4, 5, 6, 7, 8
Populate in this order, odd amount per
CPU allowed. Requires three ranks or
more per channel.
Fault resilient population order
{1, 2, 3, 4, 5, 6}
Supported with 6 DIMMs per CPU.
Installing and removing system components
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