Principles of Operation
15
Internal Clock
The internal clock has a 36 MHz time base for the DT9841, DT9841E, and DT9841-VIB
modules and an 18 MHz time base for the DT9842/2 and DT9842/8 modules. Conversions
start on a high-to-low transition after a rising edge of the internal calibration signal.
Use software to specify the internal clock source and the frequency at which to pace the input
and output operations and to start the sample clock. For the DT9841, DT9841E, and
DT9841-VIB, the sampling frequency ranges from 200 Hz to 100 kHz. For the DT9842/2 and
DT9842/8, the sampling frequency ranges from 0 Hz to 100 kHz.
Note:
According to sampling theory (Nyquist Theorem), specify a frequency that is at least
twice as fast as the input’s highest frequency component. For example, to accurately sample a
20 kHz signal, specify a sampling frequency of at least 40 kHz to avoid aliasing.
The actual frequency that the module can achieve may be slightly different than the frequency
you specified due to the accuracy of the clock (0.01% for the DT9840 Series). You can
determine the actual clock frequency using software.
DT9841, DT9841E, and DT9841-VIB Internal Clock
On the DT9841, DT9841E, and DT9841-VIB modules, the value that you specify for the
internal clock frequency is multiplied by 512 internally to set the oscillator on the module. The
resulting signal from the oscillator is then divided by 2 to provide a clock signal to the A/D
and D/A converters that is oversampled 256 times and has a 50% duty cycle. For example, if
you specify an internal clock frequency of 100 kHz, internally the module sets the oscillator to
51.2 MHz then divides the resulting signal by 2 to provide a 25.6 MHz signal with a 50% duty
cycle to the A/D and D/A converters.
In addition, if you specify a sampling frequency between 200 Hz and 5 kHz, the DT9841,
DT9841E, and DT9841-VIB modules automatically filter the data using decimation and
interpolation filters. Refer to the
DT9840 Series DSP Library User’s Manual
for more
information on how these filters are implemented.
Once the sample clock is started, the DT9841, DT9841E, and DT9841-VIB modules require 37
clock pulses before the first conversion is completed (at 100 kHz, this delay is 370
μ
s).
Thereafter, the data is converted without delay (at 100 kHz, sampling occurs every 10
μ
s). This
initial delay is required by the filtering algorithms of the A/D and D/A converters.
DT9842/2 and DT9842/8 Internal Clock
Because the DT9842/2 and DT9842/8 use successive-approximation A/D converters and
provides no inherent filtering, no initial delay occurs (like on the DT9841, DT9841E, and
DT9841-VIB). Therefore, the converter always runs as fast as possible (at 100 kHz, sampling
occurs every 10
μ
s).
Internally, the DT9842/2 and DT9842/8 hardware divides the 18 MHz time base by a 32-bit
value to achieve the closest rate to the sampling rate you requested.
Summary of Contents for DT9840 Series
Page 1: ...DT9840 Series UM 19197 T User s Manual Title Page ...
Page 4: ......
Page 44: ...Chapter 1 44 ...
Page 76: ...Chapter 2 76 ...
Page 98: ...Appendix A 98 ...
Page 124: ...Appendix B 124 ...
