USB3-FRM13 User’s Manual
20
3-2 Device Features
(1)
MDR-26 Connecter : J8, J4
Camera Link Base (J8), medium/Full (J4) Signal Connector
(2)
LVDS Link : U6, U7, U11
It is protected a circuit that the interface of high voltage higher than 3.3V CMOS Logic is
exchanged to normal 3.3V Logic Level.
(3)
FPGA : U9
All of the functions are controlled by the logic program of the FPGA.
(4)
Regulator : U1, U2, U4
The Regulator is for supplying the power (3.3V) to the board.
(5)
USB 3.0 Interface Chipset : U8
This block supports USB3.0 Super Speed interface.
(6)
DDR Memory : REF1, REF2
After save the data in a frame unit, transfer to PC through FPGA.
