DAQ system PCIe-FRM24 User Manual Download

Page: 27 / 29

PCIe-FRM24 Users Manual (Rev 1.3)

27-

http://www.daqsystem.com

Appendix

A.1 General Specification

Specification

General



PCI Express Specification Revision 1.0



PCI Express 4x interface



Camera Link interface specification 1.0 and 1.1



Support a Full Camera Link Interface



Two 26-pin (MDR-26) Connectors with full support of the “Full”

Camera Link Specification



Video data rate of up to maximum 680M bytes/sec



H/W and SDK is controlled by a programmable FPGA



Transmit Image Frame Data to PC

Software

Supported OS

Windows XP/7/810

API

Interface with Application through client DLL

Sample Software

Test Sample software for evaluation

Summary of Contents for PCIe-FRM24

Page 1: ...system is believed to be accurate and reliable However no responsibility is assumed by DAQ system for its use nor for any infringements of patents or other rights of third parties which may result fr...

Page 2: ...scription of the functional blocks 3 3 Connector Pin out 3 3 1 J4 MDR26 Connecter 3 3 2 J2 MDR26 Connecter 3 3 3 J1 Connecter 3 3 4 J5 Connecter 3 3 2 J7 Connecter 3 3 5 SW1 4 Installation 4 1 Hardwar...

Page 3: ...nk configuration and Area Scan Camera Line Scan Camera Monochrome Camera Link Camera The operation of the board is controlled by program API figure 1 1 shows connection of the system usually PC Figure...

Page 4: ...www daqsystem com Figure 1 2 Picture of PCIe FRM24 board real operation Figure 1 2 shows physical connection of the board to the Camera Link Camera At the left side there are two Camera Link connecto...

Page 5: ...680Mbytes sec UART Data bit 8 1 start 1 stop No parity 9600 19200 38400 57600 115200bps Rx Tx External Device Interface 4 TTL Digital Input Output and 2 TTL trigger Input Signals and 4 pair RS 422 Use...

Page 6: ...PCI Express 4x interface PCI Target Master PCI Express 4x BUS Local Bus Address Data Mem I O Reserved 0x00 0x5F Reserved 0x70 0xAF UART 0x60 Camera Link LVDS 0xC0 Interrupt controller DIO 0xD0 Ext Add...

Page 7: ...on Controller Digital I O board etc It can control a camera Figure 2 2 Encoder Trigger Control Figure 2 3 shows the Photo coupler circuit The output current has to be used under 10mA EA EB EZ REV EA E...

Page 8: ...ion 3 1 PCIe FRM24 Layout Figure 3 1 PCIe FRM24 PCB Layout The board has five LEDs to indicate the operation status LED1 LED4 turns on when PCI Express Lane 4 differential signal is normal state LED5...

Page 9: ...J4 Signal Connector 2 LVDS Link U12 U15 U18 Receive Image frame 3 FPGA U16 All of the board functions are controlled by the Logic program of the FPGA 4 PCI Express Chipset U8 It s a PCI Express Bridge...

Page 10: ...n connector J2 J4 for Camera Link connection and 26pin Box Header connecter for external Trigger I O Figure 3 2 shows the bracket of the board and connector 3 10 9 8 7 6 1 2 5 4 19 18 17 16 15 14 13 1...

Page 11: ...functions are based on the Camera link standard so please refer to the Camera link standard document for more description and information 3 10 9 8 7 6 1 2 5 4 19 18 17 16 15 14 13 12 11 24 23 22 21 20...

Page 12: ...ck 10 Y2 Camera link LVDS receive data6 11 Y1 Camera link LVDS receive data5 12 Y0 Camera link LVDS receive data4 13 Inner Shield 14 Inner Shield 15 Z3 Camera link LVDS receive data11 16 ZCLK Camera l...

Page 13: ...ons are based on the Camera link standard so please refer to the Camera link standard document for more description and information 3 10 9 8 7 6 1 2 5 4 19 18 17 16 15 14 13 12 11 24 23 22 21 20 Inner...

Page 14: ...N2 Camera link LVDS receive data2 11 RxIN1 Camera link LVDS receive data1 12 RxIN0 Camera link LVDS receive data0 13 Inner Shield 14 Inner Shield 15 CC4 Camera Control output 4 Refer to Figure 3 5 16...

Page 15: ...mapped by Digital output Below picture display that each bit position set CC1 CC1 CC_D0 CC2 CC2 CC_D1 CC3 CC3 CC_D2 CC4 CC4 CC_D3 Figure 3 5 Camera Control LVDS Digital Output Circuit 3 3 3 J1 Connec...

Page 16: ...n 2 N C No Connection 3 EA Encoder A Positive Phase 4 EA Encoder A Negative Phase 5 EB Encoder B Positive Phase 6 EB Encoder B Negative Phase 7 EZ Encoder Z Positive Phase 8 EZ Encoder Z Negative Phas...

Page 17: ...Ie FRM24 board is designed of four maximum PCIe FRM24 boards at the same time so as usable Distribution of each board sets it up through 4 pin switch SW1 in a board 1 ON OFF SW1 2 Figure 3 6 SW2 Switc...

Page 18: ...CD Driver Manual API Sample Source etc Document Folder Manual and Catalog Driver Folder pcie_frm24 sys pcie frm24 inf Sample Folder Sample Application and DLL TestApp Folder FrmTest exe 4 1 2 Installa...

Page 19: ...d is completely Plug Play There are no switches or jumpers to set Therefore you can install it easily Your OS requirement Windows 2000 SP4 or Windows XP SP1 above The PCIe FRM24 connects to Express Ca...

Page 20: ...est driver in these locations Check Search removable media floppy CD ROM Check include this location in the search Click Browse button Select the folder where the drivers are located Click OK Click Ne...

Page 21: ...PCIe FRM24 Users Manual Rev 1 3 21 http www daqsystem com...

Page 22: ...o the following steps to show up the Device Manager window My Computer properties Hardware Device Manager DAQSystem PCIe FRM24 If you can see the PCIe FRM24 at Multifunction Adaptors the driver instal...

Page 23: ...me data to memory or hard disk and displays it to Hexa decimal values which can utilize necessary frame data to developers The other is FrameView exe It is easy to understand frame data to display the...

Page 24: ...Select Bytes 1 8bit Bytes 2 16bit and Bytes 4 32bit 2 Get the resolution of the sensor with Get Size 3 Resolution Select the resolution you want to display on the screen Or select the resolution obta...

Page 25: ...600 1024x768 1280x720 1280x1024 1600x1200 1920x1080 1920x1200 2048x1536 2560x2048 4080x2448 Set Detected button Returns to the resolution obtained from Get Size 10 Device Init button Press this button...

Page 26: ...115200 Baud Rate 19 Send button It sends UART data in the next column 20 Get button It gets the data from UART buffer 21 Clear button It clears the UART Receiver buffer 22 Auto Save When checking sav...

Page 27: ...ation 1 0 and 1 1 Support a Full Camera Link Interface Two 26 pin MDR 26 Connectors with full support of the Full Camera Link Specification Video data rate of up to maximum 680Mbytes sec H W and SDK i...

Page 28: ...PCIe FRM24 Users Manual Rev 1 3 28 http www daqsystem com A 2 Physical Dimension 139 75 x 96 5 mm 139 75 96 5...

Page 29: ...e Standard for Digital Cameras and Frame Grabbers Camera Link committee 2 PCI Local Bus Specification Revision2 1 PCI Special Interest Group 3 How to install PCI DAQ Board DAQ system 4 AN201 How to bu...

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