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PCIe-AIO14 User Manual (Rev 1.2) 

 

- 7 - 

                                                                       

                                                     

http://www.daqsystem.com

 

3.2.4    Digital I/O Connector(J8) 

BOX HEADER 40-pin J8 connector has 16 DIN8 to DIN23 digital input signals and 16 DOUT8 

to  DOUT23  digital  output  signals.  Applicable  connector  is  HIF3F-40PA-2.54DS  (Hirose)  or 

compatible product. 

 

[Table 3-3. J8 Connector Description]

 

 

Pin# 

Description 

Pin# 

Description 

Digital Input, DIN8 

Digital Input, DIN9 

Digital Input, DIN10 

Digital Input, DIN11 

Digital Input, DIN12 

Digital Input, DIN13 

Digital Input, DIN14 

Digital Input, DIN15 

Digital Input, DIN16 

10 

Digital Input, DIN17 

11 

Digital Input, DIN18 

12 

Digital Input, DIN19 

13 

Digital Input, DIN20 

14 

Digital Input, DIN21 

15 

Digital Input DIN22 

16 

Digital Input, DIN23 

17 

Digital Input, DIN_COM2 

18 

Digital Ground, GND 

19 

Digital Ground,, GND 

20 

Digital 

Output, 

DOUT_COM2 

21 

Digital Output, DOUT8 

22 

Digital Output, DOUT9 

23 

Digital Output, DOUT10 

24 

Digital Output, DOUT11 

25 

Digital Output, DOUT12 

26 

Digital Output, DOUT13 

27 

Digital Output, DOUT14 

28 

Digital Output, DOUT15 

29 

Digital Output, DOUT16 

30 

Digital Output, DOUT17 

31 

Digital Output, DOUT18 

32 

Digital Output, DOUT19 

33 

Digital Output, DOUT20 

34 

Digital Output, DOUT21 

35 

Digital Output, DOUT22 

36 

Digital Output, DOUT23 

37 

+12V_EXT 

38 

Reserved 

39 

Reserved 

40 

Reserved 

  The PC case bracket fixing cable is available, so please contact us when you purchase the   

product. 

 

 

Summary of Contents for PCIe-AIO14

Page 1: ...Q system is believed to be accurate and reliable However no responsibility is assumed by DAQ system for its use nor for any infringements of patents or other rights of third parties which may result f...

Page 2: ...dware 3 1 Board Switch Setup 3 2 I O Connector J1 J2 3 3 Digital I O Connector J8 3 4 Analog Signal MUX 3 5 Digital I O 4 Installation 4 1 Confirm Contents 4 2 Installation Sequence 4 3 Device Verific...

Page 3: ...analog signal multiplex input for each ADC 10V Differential Signal input Level 10 2Msps Variable Sampling Setup 32 Ch Software Trigger 24 Bit Digital Input Output Input output shielding by photo coup...

Page 4: ...input for each ADC Resolution 16 bit Sampling Rate 10 2Msps 1 Channel Signal Type Differential Digital I O Bit Inpit 24 Bit Output 24 Bit Isolator Photo Coupler TLP291 4 or Compatible Input Signal 12...

Page 5: ...nnector description and board installation 3 1 Board Switch Setup Explain the jumper and switch selection on the board J7 J1 J2 Fig 3 1 Connector Switch Layout 3 1 1 Board Number Setup Switch J7 It is...

Page 6: ...r compatible product Table 3 1 J1 Connector Description Pin Description Pin Description 1 Reserved 35 Reserved 2 Analog Ground AGND 36 Reserved 3 30 Input AINN30 37 Analog Ground AGND 4 30 Input AINP3...

Page 7: ...alog Ground AGND 34 0 Input AINP0 68 Reserved Please inquire about the availability of analog input cable and terminal block board when you purchase the product 3 2 2 Connector J2 The 16 bit analog di...

Page 8: ...ut AINP9 60 Digital Ground GND 27 7 Input AINN7 61 Analog Ground AGND 28 7 Input AINP7 62 Digital Ground GND 29 5 Input AINN5 63 Analog Ground AGND 30 5 Input AINP5 64 Digital Ground GND 31 3 Input AI...

Page 9: ...tal Input DIN18 12 Digital Input DIN19 13 Digital Input DIN20 14 Digital Input DIN21 15 Digital Input DIN22 16 Digital Input DIN23 17 Digital Input DIN_COM2 18 Digital Ground GND 19 Digital Ground GND...

Page 10: ...l MUX When one channel block is composed of a plurality of data channel selections the interchannel acquisition interval is a maximum sampling rate of 2Msps supported by the chip and the interval betw...

Page 11: ...he DIN_COM pin and the HI input signal is input to the DIN signal the internal signal becomes LO to sense the signal input DIN0 BIN0 BINx 3 3V 3 3V 2 4K DINx 2 4K DIN_COM Fig 3 6 Digital Input Circuit...

Page 12: ...Installation CD Driver Manual API Sample Program etc 4 2 Installation Sequence The board should be used in Windows XP SP2 over Windows 7 Windows 8 and Windows 10 First turn off the PC insert the PCIe...

Page 13: ...elow will appear and select Install from a list or specific location and click the Next button Fig 4 2 Software Installation Selection In the window shown below locate the CD or specific location wher...

Page 14: ...allation window appears and the following list of installed boards appears click the Continue button Fig 4 4 Show the board you are installing The Completing the Found New Hardware Wizard window appea...

Page 15: ...hen the board installation is complete check that the device is assigned to the OS Control Panel System System Properties Device Manager Select Execute in order Under Device Manager Multifunction Adap...

Page 16: ...function etc Acquisition data storage consists of a continuous mode which operates as a ring buffer format in succession from the beginning of the memory to the end address Over Writing and a single...

Page 17: ...variables Start data collection and create a data memory buffer 5 2 4 Checking the measurement status ADC_GetBufferedCount ADC_GetBlockState Number of data buffering samples in continuous mode read wr...

Page 18: ...d trigger motion control 5 3 4 Start measurement ADC_Run ADC_TriggerRun Initialize logic variables start data acquisition and data memory buffers and start trigger operation 5 3 5 Checking the Trigger...

Page 19: ...CIe AIO14 among the devices By using the dedicated library API the setting value is not affected but the default value is PCIe AIO14 4 2 Board Sel Select the device sequence number As described in Sec...

Page 20: ...h The number of samples read from the API when reading collected data 14 WR Ptr Buffer write pointer 15 RD Ptr Buffer read pointer 16 Sample sec Number of samples per second per channel block 17 Save...

Page 21: ...les per channel is the product of Samples and the number of channels that set the trigger variable 31 Set Sets the number of trigger acquisition samples 32 State Read the trigger status value It is di...

Page 22: ...oard recognition is basically necessary Execution order Select device number 1 in Figure 5 2 Select board number 2 Open device 3 Check logic DLL version 5 Stop device 4 5 4 3 Continuous Normal Mode Op...

Page 23: ...7 5 4 5 Trigger Mode Operation Sequence Data collection execution performs continuous or single mode memory buffering Execute trigger operation for the selected channel to save and stop sample data wh...

Page 24: ...ollowing figure If more than one channel is selected the time interval to the adjacent channel is the ADC highest sampling rate 2Msps and the interval between channel blocks maintains the time of the...

Page 25: ...om References 1 PCI Express Base Specification Revision 2 0 2 PCI Exprss to PCI PCI X Bridge Specification Revision 1 0 3 PCI Local Bus Specification PCI SIG 4 AN201 How to build application using API...

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