Dallas Semiconductor DS21354L, Manual

Page: 36 / 117

DS21354 & DS21554
36 of 117
RAI generation conforms to ETS 300 011 specifications and a constant Remote Alarm will be transmitted
if the DS21354/554 cannot find CRC4 multiframe synchronization within 400 ms as per G.706.
CCR3: COMMON CONTROL REGISTER 3 (Address=1B Hex)
(MSB) (LSB)
TESE TCBFS TIRFS – RSRE THSE TBCS RCLA
SYMBOL POSITION NAME AND DESCRIPTION
TESE CCR3.7 Transmit Side Elastic Store Enable.
0 = elastic store is bypassed
1 = elastic store is enabled
TCBFS CCR3.6 Transmit Channel Blocking Registers (TCBR) Function Select.
0 = TCBRs define the operation of the TCHBLK output pin
1 = TCBRs define which signaling bits are to be inserted
TIRFS CCR3.5 Transmit Idle Registers (TIR) Function Select. See Section 11.1 for
details.
0 = TIRs define in which channels to insert idle code
1 = TIRs define in which channels to insert data from RSER (i.e.,
Per=Channel Loopback function)
- CCR3.4 Not Assigned. Should be set to zero when written to.
RSRE CCR3.3 Receive Side Signaling Re–Insertion Enable. See Section 10.2.1 for
details.
0 = do not re–insert signaling bits into the data stream presented at the
RSER pin
1 = re–insert the signaling bits into data stream presented at the RSER pin
THSE CCR3.2 Transmit Side Hardware Signaling Insertion Enable. See Section
10.2.2 for details.
0 = do not insert signaling from the TSIG pin into the data stream
presented at the TSER pin
1 = insert signaling from the TSIG pin into the data stream presented at
the TSER pin
TBCS CCR3.1 Transmit Side Backplane Clock Select.
0 = if TSYSCLK is 1.544 MHz
1 = if TSYSCLK is 2.048/4.096/8.192 MHz
RCLA CCR3.0 Receive Carrier Loss (RCL) Alternate Criteria.
0 = RCL declared upon 255 consecutive zeros (125 us)
1 = RCL declared upon 2048 consecutive zeros (1 ms)
CCR4: COMMON CONTROL REGISTER 4 (Address=A8 Hex)
(MSB) (LSB)
RLB LLB LIAIS TCM4 TCM3 TCM2 TCM1 TCM0
SYMBOL POSITION NAME AND DESCRIPTION
RLB CCR4.7
Remote Loopback.
0 = loopback disabled
1 = loopback enabled