Document Number: 002-04721 Rev.*A
Page 63 of 74
MB966B0 Series
Used setting
Mode
Selected Source
Clock
Clock/Regulator and FLASH Settings
Run mode
PLL
CLKS1 = CLKS2 = CLKB = CLKP1 = CLKP2 = 32MHz
Main osc.
CLKS1 = CLKS2 = CLKB = CLKP1 = CLKP2 = 4MHz
RC clock fast
CLKS1 = CLKS2 = CLKB = CLKP1 = CLKP2 = 2MHz
RC clock slow
CLKS1 = CLKS2 = CLKB = CLKP1 = CLKP2 = 100kHz
Sub osc.
CLKS1 = CLKS2 = CLKB = CLKP1 = CLKP2 = 32kHz
Sleep mode
PLL
CLKS1 = CLKS2 = CLKP1 = CLKP2 = 32MHz
Regulator in High Power Mode,
(CLKB is stopped in this mode)
Main osc.
CLKS1 = CLKS2 = CLKP1 = CLKP2 = 4MHz
Regulator in High Power Mode,
(CLKB is stopped in this mode)
RC clock fast
CLKS1 = CLKS2 = CLKP1 = CLKP2 = 2MHz
Regulator in High Power Mode,
(CLKB is stopped in this mode)
RC clock slow
CLKS1 = CLKS2 = CLKP1 = CLKP2 = 100kHz
Regulator in Low Power Mode,
(CLKB is stopped in this mode)
Sub osc.
CLKS1 = CLKS2 = CLKP1 = CLKP2 = 32kHz
Regulator in Low Power Mode,
(CLKB is stopped in this mode)
Timer mode
PLL
CLKMC = 4MHz, CLKPLL = 32MHz
(System clocks are stopped in this mode)
Regulator in High Power Mode,
FLASH in Power-down / reset mode
Main osc.
CLKMC = 4MHz
(System clocks are stopped in this mode)
Regulator in High Power Mode,
FLASH in Power-down / reset mode
RC clock fast
CLKMC = 2MHz
(System clocks are stopped in this mode)
Regulator in High Power Mode,
FLASH in Power-down / reset mode
RC clock slow
CLKMC = 100kHz
(System clocks are stopped in this mode)
Regulator in Low Power Mode,
FLASH in Power-down / reset mode
Sub osc.
CLKMC = 32 kHz
(System clocks are stopped in this mode)
Regulator in Low Power Mode,
FLASH in Power-down / reset mode
Stop mode
stopped
(All clocks are stopped in this mode)
Regulator in Low Power Mode,
FLASH in Power-down / reset mode