Cypress EX-USB FX3, Programmer'S Manual

Page: 39 / 192

FX3 Programmers Manual, Doc. # 001-64707 Rev. *C 39
FX3 Overview
3.7 DMA Mechanism
Figure 3-11. DMA Mechanism
Non-CPU intervened data chunk transfers between a peripheral and CPU or system memory,
between two different peripherals or between two different gateways of the same peripheral, loop
back between USB end points, are collectively referred to as DMA in FX3.
Figure 3-11 shows a logical paths of data flow; however, in practice, all DMA data flows through the
System memory as shown in the following figure.
Figure 3-12. System Memory
CPU
PERIPHERAL 1
PER
IP
HERAL 2
SYSTEM
MEMORY
1
2
3
FX3
4
CPU
PERIPHERAL 1
PERIPHERAL
2
SYSTEM
MEMORY
1
2
FX3
4
3
CPU
PERIPHERAL 1
PERIPHERAL
2
SYSTEM
MEMORY
FX3
BRIDGE
SYSTEM AHB
DMA AHB
PERIPHERAL 1_AHB
PERIPHERAL_2_AHB