CY3280-28XXX Universal CapSense® Controller Development Kit Guide, Spec. # 001-57457 Rev. **
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Hardware Design Notes
3.2.11
CY3280-CPM1 Board Connector (J7)
Figure 3-12. CY3280-CPM1 Board Connector
The CY3280-28XXX Universal CapSense Controller Board connects with the CY3280-CPM1
CapSense Plus Module through P3. The CY3280-CPM1 CapSense Plus Module is used to demon-
strate extended features of the CY8C28XXX beyond CapSense. By default, R68 and R69 are not
populated.
Table 3-4
indicates the usage of pins when the CY3280-CPM1 Universal CapSense Plus
Controller Board is connected.
Table 3-4. Pin Usage
Pin
PSoC Port
Description
1
P5[3]
N/A
2
P5[2]
N/A
3
P5[1]
N/A
4
P5[0]
N/A
5
P0[3]
N/A
6
P0[2]
N/A
7
P0[1]
Analog input/output signal of CY3280-CPM1 Board
8
P0[0]
Analog output signal of CY3280-CPM1 Board
9
GND
Ground
10
GND
Ground
11
P3[7]
Button output of CY3280-CPM1 Board
12
P3[6]
SPI clock signal input of CY3280-CPM1 Board
13
P3[5]
Button output of CY3280-CPM1 Board
14
P3[4]
SPI data signal input of CY3280-CPM1 Board
15
P3[3]
N/A
16
P3[2]
N/A
17
P3[1]
N/A
18
P3[0]
N/A
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