Cypress CY3677 User Manual Download Page 29 | Manualshive

Page: 29 / 45

Cypress CY3677 User Manual Download Page 29

Example Projects

CY3677 Evaluation Kit User Guide, Doc. No. 002-12185 Rev. *D

29

Figure 5-3. LVDS 2.5 V, 50 MHz Clock Measured with DC Coupling, 50-

Ω Scope Termination

Figure 5-4. LVCMOS 1.8 V, 26 MHz Clock Measured with DC Coupling, 10X Settings, 50-

Ω Scope Termination

«
...
27
28
29
30
31
...
»

Summary of Contents for CY3677

Page 1: ...CY3677 Evaluation Kit User Guide Doc No 002 12185 Rev D Cypress Semiconductor 198 Champion Court San Jose CA95134 1709 Phone USA 800 858 1810 Phone Intnl 1 408 943 2600 www cypress com...

Page 2: ...BILITY AND FITNESS FOR A PARTICULAR PURPOSE To the extent permitted by applicable law Cypress reserves the right to make changes to this document without further notice Cypress does not assume any lia...

Page 3: ...ption 14 3 3 CY3677 EVK USB Connection 14 3 4 Programming the CY29430 15 3 5 Functional Programming of the CY29430 16 3 5 1 Generating and Programming the Device Configuration Profile 16 3 6 eFuse Pro...

Page 4: ...x 32 A 1 BCP Script to Disable the Default Power up Profile of CY29430 32 B Appendix 34 B 1 Termination Settings of Differential Clock Outputs 34 B 2 Termination Settings of LVCMOS Clock Output 35 B 3...

Page 5: ...r ESD precautions are recommended to avoid performance degradation or loss of functionality Store unused CY3677 Evaluation Kit boards in the protective shipping package General Safety Instructions ESD...

Page 6: ...pplications The differential I O standards supported are LVDS LVPECL High Speed Current Steering Logic HCSL and Current Mode Logic CML The single ended signal supported is LVCMOS The device also suppo...

Page 7: ...the kit software The Kit Operation chapter describes the major features of the CY3677 Evaluation Kit The Hardware chapter describes the hardware content of the CY3677 Evaluation Kit and the hardware...

Page 8: ...ibes Cautions or unique functionality of the product 1 6 Acronyms Table 1 2 List of Acronyms used in this Document Acronym Definition BOM Bill of Materials CML Current Mode Logic DNP DNM Do Not Popula...

Page 9: ...Evaluation Kit Only This executable file installs only the CY3677 EVK contents which include example projects hardware files and user documents This package can be used if all the software prerequisit...

Page 10: ...stall the CY3677 EVK in a location other than the default and then click Next as shown in Figure 2 2 Note When you click Next the CY3677 EVK installer automatically installs the required software if i...

Page 11: ...rview 6 Read and accept the End User License Agreement and then click Next When the installation begins a list of packages appears on the Installation page A green check mark appears next to each pack...

Page 12: ...t 2 4 Uninstall Software You can uninstall the software using one of the following methods Go to Start All Programs Cypress Cypress Update Manager Cypress Update Manager and select the specific softwa...

Page 13: ...ystal Oscillator TCXO reference input The kit is capable of generating fixed 3 3 V 2 5 V and 1 8 V voltages from a 5 V USB port The on board PSoC 5LP U7 performs the USB to I2 C conversion There is on...

Page 14: ...lating the J5 jumper shunt The single ended LVCMOS clock does not need any on board termination settings Figure 3 2 illustrates the top view and bottom view of the CY3677 EVK Figure 3 2 CY3677 EVK Top...

Page 15: ...also contains volatile memory that stores an exact copy of the eFuse at the release of reset at power up The output frequency depends on the configurations in the volatile memory Writing the entire d...

Page 16: ...ing within the configuration to be programmed 3 5 1 Generating and Programming the Device Configuration Profile The ClockWizard 2 1 is used to generate profiles and to perform functional programming o...

Page 17: ...ting a Configuration Profile using ClockWizard 2 1 7 Click Results in the navigation pane to view the results at any time after a JEDEC file has been generated for a configuration as shown in Figure 3...

Page 18: ...e of the ClockWizard 2 1 software Figure 3 8 Programming Configuration Profile using ClockWizard 2 1 9 The CY29430 supports the selections of four frequency profiles for a single configuration The Fre...

Page 19: ...tive click Large change update The expected output frequency will appear on the oscilloscope Note Large change programming refers to the case where the frequency is changing more than 500 ppm Figure 3...

Page 20: ...age to the device After the device is eFuse programmed you can only change the output frequency through the following ways Note that these changes will revert after a power cycle Large change programm...

Page 21: ...e CY29430 device Following are the key features of the CY3677 EVK Powered from a USB port Jumper to configure on board LDO output Jumper to short or isolate external connection for termination setting...

Page 22: ...the OE input of the CY29430 to enable or disable the clock output Frequency Select Jumpers J14 J15 J14 and J15 are used to set the frequency select bits of CY29430 Crystal On board 114 285 MHz OT3 cry...

Page 23: ...ists the hardware settings required for power selection CAUTION The J13 selection must match with the software configuration of the supply voltage during functional programming and must be set to 2 5...

Page 24: ...source for the CY29430 device 4 2 6 TCXO Input Reference The CY29430 device can also be evaluated with external TCXO reference The external reference clock source must be connected to the SMA connect...

Page 25: ...s R30 and R31 are the on board output termination resistors The termination settings are controlled by the J5 jumper shunt The typical laboratory setup for the evaluation of this kit is shown in Figur...

Page 26: ...Hardware CY3677 Evaluation Kit User Guide Doc No 002 12185 Rev D 26 Figure 4 4 CY3677 EVK Connected to an Oscilloscope...

Page 27: ...scope termination and type of coupling used during measurement These measurements are done using an 8 GHz oscilloscope SMA cables 50 scope termination and DC coupling Sample example project outputs a...

Page 28: ...Evaluation Kit User Guide Doc No 002 12185 Rev D 28 Figure 5 1 LVPECL 3 3 V 156 25 MHz Clock Measured with DC Coupling 50 Scope Termination Figure 5 2 HCSL 2 5 V 100 MHz Clock Measured with DC Coupli...

Page 29: ...luation Kit User Guide Doc No 002 12185 Rev D 29 Figure 5 3 LVDS 2 5 V 50 MHz Clock Measured with DC Coupling 50 Scope Termination Figure 5 4 LVCMOS 1 8 V 26 MHz Clock Measured with DC Coupling 10X Se...

Page 30: ...mon tab 3 Change VCXO settings from Disable to Enable Select Total Pull Range to 275 ppm and VCXO Gain Polarity to Positive Click the Generate button The settings is shown in Figure 5 5 Figure 5 5 VCX...

Page 31: ...support web page or e mail at clocks cypress com Note 1 The default 114 285 MHz LVDS profile programmed into the device does not have the OE functionality enabled Hence you cannot control it through...

Page 32: ...r choice and the extension iic for example myfile iic 2 Write the following set of commands in your iic file w 55 63 00 w 55 63 01 delay 1 w 55 d7 C0 delay 5 w 55 61 00 w 55 61 03 delay 5 w 55 61 00 3...

Page 33: ...Appendix CY3677 Evaluation Kit User Guide Doc No 002 12185 Rev D 33 Figure A 1 BCP Script to Disable the Default Power up Profile of CY29430 4 4 6 7...

Page 34: ...ion Settings of Differential Clock Outputs The CY29430 device supports four high speed differential I O standards Figure B 1 illustrates industry standard differential termination techniques for refer...

Page 35: ...nd the receiver Figure B 2 Recommended LVCMOS Termination Scheme for DC AC Measurements 50 Transmitter Receiver VDD VDD RS CL The desired output measurement can be done using an SMA cable connected to...

Page 36: ...Appendix CY3677 Evaluation Kit User Guide Doc No 002 12185 Rev D 36 B 3 Schematics Figure B 3 Block Diagram...

Page 37: ...Appendix CY3677 Evaluation Kit User Guide Doc No 002 12185 Rev D 37 Figure B 4 Power Supply Design and LED Indicators...

Page 38: ...CY3677 Evaluation Kit User Guide Doc No 002 12185 Rev D Figure B 5 Controller Schematics...

Page 39: ...CY3677 Evaluation Kit User Guide Doc No 002 12185 Rev D Figure B 6 CY29430 Schematics...

Page 40: ...Appendix CY3677 Evaluation Kit User Guide Doc No 002 12185 Rev D 40 B 4 Fabrication Drawing Figure B 7 Fabrication Drawing...

Page 41: ...s 9 146280 0 02 10 1 J5 VCM CONN HEADR BRKWAY 100 02POS STR TE Connectivity AMP Connectors 9 146280 0 02 11 1 J3 USB MINI B MINI USB RCPT R A DIP TE Connectivity AMP Connectors 1734510 1 12 4 J7 J8 J1...

Page 42: ...rochip Technology MIC5301YD5 TR 35 1 U10 PUSBM12VX4 TL 115 TVS DIODE 5 5VWM 12VC 6HXSON NXP Semiconductors PUSBM12VX4 TL 115 36 1 Y1 CRYSTAL4 SM CRYSTAL 114 2850MHZ 18PF SMD NDK NX3225SA 114 285MHZ EX...

Page 43: ...3GEY0R00V 50 2 R216 R225 1k RES SMD 1K OHM 1 1 10W 0603 Panasonic Electronic Components ERJ 3EKF1001V 51 2 R221 R222 2 2K RES SMD 2 2K OHM 5 1 10W 0603 Yageo RC0603JR 072K2L 52 1 R42 0 ohm RES SMD 0 0...

Page 44: ...n Profile Updated table title for Table 4 4 and Table 4 7 B 08 16 2016 TAVA Updated Introduction Programming the CY29430 and Generating and Programming the Device Configuration Profile Updated Table 4...

Page 45: ...AD9522 4 PCBZ AD9552PCBZ 125614 HMC850LC3 EKIT01 HMC767LP6CE NBA3N206SDGEVB EV ADF4355 3SD1Z AD9516 1 PCBZ AD9516 4PCBZ AD9520 5PCBZ AD9530 PCBZ AD9547 PCBZ AD9553 PCBZ AD9557PCBZ AD9559 PCBZ LMH2180S...

Reviews:

No comments