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CY3650 USB Development System User’s Guide
After power up or manual reset, all I/O port bits have a ‘1’ written to them, leaving them in the input/weak-pullup
mode.
Each port is accessed by performing an I/O write or read operation to the appropriate address. All bits of the port
are written or read together. Port addresses are given in the device specification.
5.5. Suspend Mode
The development board supports a suspend mode. The board will enter suspend mode following a power on reset if
switch S1-5 is set to “Enable Suspend on Power On Reset” , or if a one is written to the Suspend bit of the “ Status &
Control” Register. When suspended, the microcontroller and the timer both stop. Any USB bus activity, a reset, or
an interrupt will take the board out of suspend mode. The Run button on the PC debug monitor will only start the
development board if a 1 was written to the Suspend bit of the Status & Control register. The Run button will not
take it out of suspend if it entered suspend following a power on reset.
5.6. Reset
Resets can be from one of these sources:
• Power on reset
• USB Bus reset (if enabled by switch S1-1; see Table 1)
• Watchdog reset (if enabled by switch S1-2; see Table 1)
• Pressing switch S2 generates a power on reset.
When one of these resets occur, the following actions take place:
• Program counter is reset to zero.
• Internal registers are reconfigured to their reset state (see device specification).
• The board will enter suspend mode following a power on reset or a reset from switch S2, if switch S1-5 is set
to Enable Suspend on Power On Reset.
• Operation will resume from address zero if switch S3-2 is set to Run on Reset. Otherwise, operation halts at
address zero, and must be started from the PC debug monitor.
The contents of both the data RAM and the program RAM are undefined at power up, and are not affected by
pressing the reset button.
5.7. USB Interface
The development board supports the low-speed (1.5 Mbps) USB mode. In this mode, the low-speed peripheral has
a 1.5 k
Ω
pull-up to +3.3V on the D
−
line. Resistor R4 provides this pull-up, and is included on the board (see Fig-
ure 4). The board is shipped without a D+ pull-up at resistor R5.
Refer to the USB 1.0 specification for further details on the low-speed USB mode.
For details on USB transmit and receive operation with the development board, consult the specification for the
emulated Cypress USB device.
6. Pin Descriptions
The development board contains three signal connectors: J1, a 60-pin header carrying target system signals; J2, a
60-pin header containing microcontroller interface signals (typically for logic analyzer connection); and J3, a 9-pin
