CapSense Express Controllers Registers TRM, Document No. 001-91082 Rev. *E
85
PWM_DUTYCYCLE_CFG5
0x46
1.5.54
PWM_DUTYCYCLE_CFG5
Address = 0x46
GPO5 PWM duty cycle configuration. This register is not applicable for parts CY8CMBR3102, CY8CMBR3106S,
CY8CMBR3108, CY8CMBR3110.
Address: 0x46
Bits
7
6
5
4
3
2
1
0
Host Access
RW
RW
Device Access
RW
RW
Bit Name
LOW_DUTY_CYCLE
HIGH_DUTY_CYCLE
Bits
Name
Description
7 : 4
LOW_DUTY_CYCLE
PWM duty cycle to be driven on GPO5 when GPO is in logic low state. This bitfield allows 16
settings for 0% to 100% duty cycle in steps of 6.67%. The valid value of this bit field ranges from
0 to 15. This bit field is not applicable for parts CY8CMBR3102, CY8CMBR3106S,
CY8CMBR3108, CY8CMBR3110.
3 : 0
HIGH_DUTY_CYCLE
PWM duty cycle to be driven on GPO5 when GPO is in logic high state. This bitfield allows 16
settings for 0% to 100% duty cycle in steps of 6.67%. The valid value of this bit field ranges from
0 to 15. This bit field is not applicable for parts CY8CMBR3102, CY8CMBR3106S,
CY8CMBR3108, CY8CMBR3110.
