CY7C67300
Document #: 38-08015 Rev. *J
Page 60 of 99
HSS Transmit Address Register [0xC07C] [R/W]
Register Description
The HSS Transmit Address register is used as the base pointer
address for the next HSS block transmit transfer.
Address
(Bits [15:0])
The Address field sets the base pointer address for the next HSS
block transmit transfer.
HSS Transmit Counter Register
[0xC07E] [R/W]
Register Description
The HSS Transmit Counter register designates the block byte
length for the next HSS transmit transfer. Load this register with
the word count minus one to start the block transmit transfer. As
each byte is transmitted this register value is decremented.
When read, this register indicates the remaining length of the
transfer.
Counter
(Bits [9:0])
The Counter field value is equal to the word count minus one
giving a maximum value of 0x03FF (1023) or 2048 bytes. When
the transfer is complete this register returns 0x03FF until
reloaded.
Reserved
Write all reserved bits with ’0’.
Table 96. HSS Transmit Address Register
Bit #
15
14
13
12
11
10
9
8
Field
Address...
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
Bit #
7
6
5
4
3
2
1
0
Field
...Address
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
Table 97. HSS Transmit Counter Register
Bit #
15
14
13
12
11
10
9
8
Field
Reserved
Counter...
Read/Write
-
-
-
-
-
-
R/W
R/W
Default
0
0
0
0
0
0
0
0
Bit #
7
6
5
4
3
2
1
0
Field
...Counter
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
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