CY7C67300
Document #: 38-08015 Rev. *J
Page 37 of 99
Host n SOF/EOP Counter Register [R]
■
Host 1 SOF/EOP Counter Register 0xC094
■
Host 2 SOF/EOP Counter Register 0xC0B4
Register Description
The Host n SOF/EOP Counter register contains the current value
of the SOF/EOP down counter. This value can be used to
determine the time remaining in the current frame.
Counter
(Bits [13:0])
The Counter field contains the current value of the SOF/EOP
down counter.
Host n Frame Register [R]
■
Host 1 Frame Register 0xC096
■
Host 2 Frame Register 0xC0B6
Register Description
The Host n Frame register maintains the next frame number to
be transmitted (current frame 1). This value is updated
after each SOF transmission. This register resets to 0x0000 after
each CPU write to the Host n SOF/EOP Count register (Host 1:
0xC092 Host 2: 0xC0B2).
Frame
(Bits [10:0])
The Frame field contains the next frame number to be trans-
mitted.
Reserved
Write all reserved bits with ’0’.
Table 60. Host n SOF/EOP Counter Register
Bit #
15
14
13
12
11
10
9
8
Field
Reserved
Counter...
Read/Write
-
-
R
R
R
R
R
R
Default
X
X
X
X
X
X
X
X
Bit #
7
6
5
4
3
2
1
0
Field
...Counter
Read/Write
R
R
R
R
R
R
R
R
Default
X
X
X
X
X
X
X
X
Table 61. Host n Frame Register
Bit #
15
14
13
12
11
10
9
8
Field
Reserved
Frame...
Read/Write
-
-
-
-
-
R
R
R
Default
0
0
0
0
0
0
0
0
Bit #
7
6
5
4
3
2
1
0
Field
...Frame
Read/Write
R
R
R
R
R
R
R
R
Default
0
0
0
0
0
0
0
0
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