CY7C67300
Document #: 38-08015 Rev. *J
Page 22 of 99
USB Diagnostic Register [0xC03C] [R/W]
Register Description
The USB Diagnostic register provides control of diagnostic
modes. It is intended for use by device characterization tests, not
for normal operations. This register is read/write by the on-chip
CPU but is write-only via the HPI port.
Port 2B Diagnostic Enable
(Bit 15)
The Port 2B Diagnostic Enable bit enables or disables Port 2B
for the test conditions selected in this register.
1:
Apply any of the following enabled test conditions: J/K, DCK,
SE0, RSF, RSL, PRD
0:
Do not apply test conditions
Port 2A Diagnostic Enable
(Bit 14)
The Port 2A Diagnostic Enable bit enables or disables Port 2A
for the test conditions selected in this register.
1:
Apply any of the following enabled test conditions: J/K, DCK,
SE0, RSF, RSL, PRD
0:
Do not apply test conditions
Port 1B Diagnostic Enable
(Bit 13)
The Port 1B Diagnostic Enable bit enables or disables Port 1B
for the test conditions selected in this register.
1:
Apply any of the following enabled test conditions: J/K, DCK,
SE0, RSF, RSL, PRD
0:
Do not apply test conditions
Port 1A Diagnostic Enable
(Bit 12)
The Port 1A Diagnostic Enable bit enables or disables Port 1A
for the test conditions selected in this register.
1:
Apply any of the following enabled test conditions: J/K, DCK,
SE0, RSF, RSL, PRD
0:
Do not apply test conditions
Pull-down Enable
(Bit 6)
The Pull-down Enable bit enables or disables full-speed pull
down resistors (pull down on both D+ and D–) for testing.
1:
Enable pull down resistors on both D+ and D–
0:
Disable pull down resistors on both D+ and D–
LS Pull-up Enable
(Bit 5)
The LS Pull-up Enable bit enables or disables a low-speed pull
up resistor (pull up on D–) for testing.
1:
Enable low-speed pull up resistor on D–
0:
Pull-up resistor is not connected on D–
FS Pull-up Enable
(Bit 4)
The FS Pull-up Enable bit enables or disables a full-speed pull
up resistor (pull up on D+) for testing.
1:
Enable full-speed pull up resistor on D+
0:
Pull up resistor is not connected on D+
Force Select
(Bits [2:0])
The Force Select field bit selects several different test condition
states on the data lines (D+/D–). Refer to
Table 32
for details.
Reserved
Write all reserved bits with ’0’.
Table 31. USB Diagnostic Register
Bit #
15
14
13
12
11
10
9
8
Field
Port 2B
Diagnostic
Enable
Port 2A
Diagnostic
Enable
Port 1B
Diagnostic
Enable
Port 1A
Diagnostic
Enable
Reserved...
Read/Write
R/W
R/W
R/W
R/W
-
-
-
-
Default
0
0
0
0
0
0
0
0
Bit #
7
6
5
4
3
2
1
0
Field
...Reserved
Pull-down
Enable
LS Pull-up
Enable
FS Pull-up
Enable
Reserved
Force Select
Read/Write
-
R/W
R/W
R/W
-
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
Table 32. Force Select Definition
Force Select [2:0]
Data Line State
1xx
Assert SE0
01x
Toggle JK
001
Assert J
000
Assert K
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