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CYV15G0100EQ

Document Number: 001-12520  Rev. **

Page 4 of 10

Equalizer Operation

The CYV15G0100EQ is a high speed adaptive cable equalizer
designed to equalize standard definition (SD) and high definition
(HD) serial digital interface (SDI) video data streams. The
CYV15G0100EQ equalizer is optimized to equalize up to 175m
of Canare L-5CFB and Belden 1694A cable

 

at 270 Mbps and up

to 70m of Canare L-5CFB and Belden 1694A cable at 1.485
Gbps. The CYV15G0100EQ equalizer contains one power
supply and typically consumes 160 mW power at 3.3V. The multi
rate equalizer meets the SMPTE 259M, SMPTE 292M, SMPTE
344M, and DVB-ASI video standards. It meets all pathological
requirements for SMPTE 292M as defined by RP198 and for
SMPTE 259M as defined by RP178. The CYV15G0100EQ
Prosumer video cable equalizer is auto adaptive from 143 Mbps
to 1.485 Gbps. 

The CYV15G0100EQ equalizer has variable gain and multiple
equalization stages that reverse the effects of the cable. This
equalization is achieved by separate regulation of the lower and
higher frequency components in the signal to give a clean output
eye diagram. The CYV15G0100EQ has DC restoration for
compensating the DC content of the SMPTE pathological
patterns.

SDI, SDI

The CYV15G0100EQ accepts single-ended or differential serial
video data streams over 75

Ω

 coaxial cable. It is recommended

to AC couple the SDI and SDI inputs as they are internally biased
to 1.2V.

SDO, SDO

The CYV15G0100EQ has differential serial output interface
drivers that use current mode logic (CML) drivers to provide
source matching for the transmission line. These outputs are
either AC coupled or DC coupled to the HOTLink II SerDes
device. 

CLI

Cable Length Indicator (CLI) is an analog output that gives an
output voltage proportional to the equalized cable length. CLI
gives an approximation of the length of cable at the differential
serial inputs (SDI, SDI). CLI works at high definition (HD) data
rates and standard definition (SD) data rates. The graph in

Figure 3

 on page 7 illustrates the CLI output voltage at various

Belden 1694A cable lengths. With an increase in cable length,
CLI output voltage decreases.

MCLADJ

Maximum Cable Length Adjust (MCLADJ) sets the approximate
maximum amount of cable to be equalized. MCLADJ works at
SD and HD data rates. 

If the MCLADJ voltage is greater than the CLI output voltage, the
CD pin is driven HIGH

 

and the outputs are muted. If the MCLADJ

voltage is less than CLI voltage, then the equalizer’s CD pin is
driven LOW and the incoming data stream is equalized. The
graph in 

Figure 2

 on page 7 illustrates the voltage required at

MCLADJ input to equalize various Belden 1694A cable lengths
for SD and HD data rates. 

If MCLADJ functionality is not needed, then this pin should be left
floating or tied to ground to allow maximum equalized cable
length.

CD/MUTE

Carrier Detect/MUTE (CD/MUTE) is a bidirectional pin that
provides an indication of the signal present at the equalizer’s
input or it controls the muting of the equalizer’s output. The
(CD/MUTE) operates for both HD and SD data rates.

If CD/MUTE is used as an output and the incoming data stream
is not present or the cable length exceeds the length that is set
by MCLADJ, the voltage at the CD/MUTE output is greater than
2.8V. If CD/MUTE is used as an output, the incoming data stream
is present and the cable length does not exceed the length that
is set by MCLADJ, then the voltage at the CD/MUTE output is
less than 0.8V.

If CD/MUTE is used as an input and is set LOW, the equalizer
serial outputs are not muted. If the CD/MUTE is used as an input
and is set HIGH, then the equalizer serial outputs are muted. 

When an invalid signal or a signal transmitted with a launch
amplitude of less than 500 mV at HD data rates is received, the
equalizer’s serial outputs are muted. 

BYPASS

The CYV15G0100EQ has a bypass mode that enables the user
to bypass the equalizer’s equalization and DC restoration
functions. When the bypass mode is set HIGH, the signal
presented at the equalizer’s differential serial inputs (SDI, SDI)
is routed to the equalizer’s differential serial outputs (SDO, SDO)
without equalizing. 

When BYPASS is set LOW, the incoming video data stream is
equalized and presented at the equalizer‘s differential serial
outputs (SDO, SDO).

In equalizer bypass mode, CD/MUTE is not functional.

AGC

Place a capacitor of 1 

μ

F between the AGC± pins of the

CYV15G0100EQ equalizer. 

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Summary of Contents for CYV15G0100EQ

Page 1: ...s SMPTE 292M SMPTE 344M and SMPTE 259M data rates The CYV15G0100EQ is optimized to equalize up to 175m of Belden 1694A coaxial cable at 270 Mbps and up to 70m of Belden 1694A coaxial cable at 1 485 Gb...

Page 2: ...o Cable Equalizer Block Diagram Differential Output Cable Length Analog Adjustor and Mute Threshold Block Carrier Detect and Mute Control Block DC Restore Equalizer MUTE BYPASS SDO SDO SDI SDI MCLADJ...

Page 3: ...he voltage applied to the MCLADJ input When the maximum cable length set by MCLADJ is reached CD is driven high and the differential output is muted If MCLADJ functionality is not needed then this pin...

Page 4: ...h CLI output voltage decreases MCLADJ Maximum Cable Length Adjust MCLADJ sets the approximate maximum amount of cable to be equalized MCLADJ works at SD and HD data rates If the MCLADJ voltage is grea...

Page 5: ...C to 70 C 3 3V 5 DC Electrical Characteristics Parameter Description Test Conditions Min Typ Max Unit VCC Supply Voltage 1 3 135 3 3 3 465 V PD Power Consumption 2 125 160 190 mW IS Supply Current 1 3...

Page 6: ...Canare L 5CFB 0 70m 800 mV transmit amplitude Equalizer pathological pattern 0 25 1 UI Output Rise Fall Time 3 4 20 80 HD data rate 80 120 220 ps Output Rise Fall Time 3 4 20 80 SD data rate 80 120 35...

Page 7: ...e vs Belden 1694A Cable Length at SD SDI and HD SDI Data Rates Figure 3 CLI Output Voltage Vs Belden 1694A Cable Length at SD SDI and HD SDI Data Rates 2 3 2 35 2 4 2 45 2 5 2 55 2 6 2 65 2 7 0 25 50...

Page 8: ...LADJ 10 VEE 11 SDO 12 SDO 13 VEE 14 VCC 15 16 CYV15G0100EQ 3 3V 3 3V 0 01 F 0 01 F 1 F RXLE SDASEL LPEN INSEL IN1 IN1 FRAMCHAR RFEN RFMODE DECMODE RXCKSEL RXMODE RXRATE RXCLKC RXCLK RXCLK RXST0 RXST1...

Page 9: ...formation Ordering Code Package Name Package Type Operating Range CYV15G0100EQ SXC SZ16 15 Pb free 16 Pin 150 Mil SOIC 0 to 70 C Package Dimension Figure 5 16 Pin 150 Mil SOIC S16 15 0 3 4 0 3 3 3 3 8...

Page 10: ...s against all charges Any Source Code software and or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and fo...

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