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CY62157ESL MoBL

®

Document #: 001-43141 Rev. **

Page 6 of 12

Switching Characteristics 

Over the Operating Range 

[9]

 

Parameter

Description

45 ns

Unit

Min

Max

Read Cycle

t

RC

Read Cycle Time

45

ns

t

AA

Address to Data Valid

45

ns

t

OHA

Data Hold from Address Change

10

ns

t

ACE

CE LOW to Data Valid

45

ns

t

DOE

OE LOW to Data Valid

22

ns

t

LZOE

OE LOW to LOW-Z

[10]

5

ns

t

HZOE

OE HIGH to High-Z

[10, 11]

18

ns

t

LZCE

CE LOW to Low-Z

[10]

10

ns

t

HZCE

CE HIGH to High-Z

[10, 11]

18

ns

t

PU

CE LOW to Power Up

0

ns

t

PD

CE HIGH to Power Down

45

ns

t

DBE

BLE/BHE LOW to Data Valid

45

ns

t

LZBE 

BLE/BHE LOW to Low-Z

[10, 12]

5

ns

t

HZBE

BLE/BHE HIGH to HIGH-Z

[10, 11]

18

ns

Write Cycle

[13]

t

WC

Write Cycle Time

45

ns

t

SCE

CE LOW to Write End

35

ns

t

AW

Address Setup to Write End

35

ns

t

HA

Address Hold from Write End

0

ns

t

SA

Address Setup to Write Start

0

ns

t

PWE

WE Pulse Width

35

ns

t

BW

BLE/BHE LOW to Write End

35

ns

t

SD

Data Setup to Write End

25

ns

t

HD

Data Hold from Write End

0

ns

t

HZWE

WE LOW to High-Z

[10, 11]

18

ns

t

LZWE

WE HIGH to Low-Z

[10]

10

ns

Notes

9. Test conditions for all parameters other than tri-state parameters assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 

3V, and output loading of the specified I

OL

/I

OH

 as shown in the 

AC Test Loads and Waveforms on page 4

.

10. At any temperature and voltage condition, t

HZCE

 is less than t

LZCE

, t

HZBE

 is less than t

LZBE

, t

HZOE

 is less than t

LZOE

, and t

HZWE

 is less than t

LZWE

 for any device.

11. t

HZOE

, t

HZCE

, t

HZBE

, and t

HZWE

 transitions are measured when the outputs enter a high-impedance state.

12. If both byte enables are toggled together, this value is 10 ns.
13. The internal write time of the memory is defined by the overlap of WE, CE

 

= V

IL

, BHE, BLE or both = V

IL

. All signals must be active to initiate a write and any of these 

signals can terminate a write by going inactive. The data input setup and hold timing must be referenced to the edge of the signal that terminates the write.

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Summary of Contents for CY62157ESL

Page 1: ...gh IO15 are placed in a high impedance state when Deselected CE HIGH Outputs are disabled OE HIGH Both Byte High Enable and Byte Low Enable are disabled BHE BLE HIGH Write operation is active CE LOW a...

Page 2: ...6 7 8 9 11 14 31 32 36 35 34 33 37 40 39 38 12 13 41 44 43 42 16 15 29 30 A5 18 17 20 19 27 28 25 26 22 21 23 24 A6 A7 A3 A2 A1 A0 A17 A4 A9 A10 A11 A12 A15 A16 OE BHE BLE CE WE IO0 IO1 IO2 IO3 IO4 IO...

Page 3: ...2 4 4 5 VCC 5 5 IOH 1 0 mA 2 4 VOL Output LOW Voltage 2 2 VCC 2 7 IOL 0 1 mA 0 4 V 2 7 VCC 3 6 IOL 2 1mA 0 4 4 5 VCC 5 5 IOL 2 1mA 0 4 VIH Input HIGH Voltage 2 2 VCC 2 7 1 8 VCC 0 3 V 2 7 VCC 3 6 2 2...

Page 4: ...hat may affect these parameters Parameter Description Test Conditions TSOP II Unit JA Thermal Resistance Junction to Ambient Still Air soldered on a 3 4 5 inch two layer printed circuit board 77 C W J...

Page 5: ...o Data Retention Time 0 ns tR 7 Operation Recovery Time tRC ns Data Retention Waveform Notes 6 Tested initially and after any design or process changes that may affect these parameters 7 Full device o...

Page 6: ...Data Setup to Write End 25 ns tHD Data Hold from Write End 0 ns tHZWE WE LOW to High Z 10 11 18 ns tLZWE WE HIGH to Low Z 10 10 ns Notes 9 Test conditions for all parameters other than tri state param...

Page 7: ...DATA VALID RC tAA tOHA tRC ADDRESS DATA OUT 50 50 DATA VALID tRC tACE tLZBE tLZCE tPU HIGHIMPEDANCE ICC tHZOE tHZCE tPD tHZBE tLZOE tDBE tDOE IMPEDANCE HIGH ISB DATA OUT OE CE VCC SUPPLY CURRENT BHE...

Page 8: ...A tAW tWC tHZOE DATAIN NOTE 19 tBW tSCE DATA IO ADDRESS CE WE OE BHE BLE tHD tSD tPWE tHA tAW tSCE tWC tHZOE DATAIN tBW tSA CE ADDRESS WE DATA IO OE BHE BLE NOTE 19 Notes 17 Data IO is high impedance...

Page 9: ...W 18 Figure 7 Write Cycle 4 BHE BLE Controlled OE LOW 18 Switching Waveforms continued DATAIN tHD tSD tLZWE tPWE tSA tHA tAW tSCE tWC tHZWE tBW NOTE 19 CE ADDRESS WE DATA IO BHE BLE tHD tSD tSA tHA tA...

Page 10: ...O15 IO0 IO7 in High Z Read Active ICC L H H L L High Z Output Disabled Active ICC L H H H L High Z Output Disabled Active ICC L H H L H High Z Output Disabled Active ICC L L X L L Data In IO0 IO15 Wri...

Page 11: ...CY62157ESL MoBL Document 001 43141 Rev Page 11 of 12 Package Diagrams Figure 8 44 Pin TSOP II 51 85087 51 85087 A Feedback Feedback...

Page 12: ...nsee a personal non exclusive non transferable license to copy use modify create derivative works of and compile the Cypress Source Code and derivative works for the sole purpose of creating custom so...

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