CyberResearch CEGC Series, User Manual, Page: 54 / 282

CEGC Series
CyberResearch
®
CPU Cards
32 ©Copyright 2008
CyberResearch, Inc.
Tx/Rx IP,TCP,and UDP checksum offloading
Tx TCP segmentation
IEEE 802.1q* Virtual Local Area Network (VLAN) support with VLAN tag
insertion, stripping, and packet filtering for up to 4096 VLAN tags
Boot ROM Preboot eXecution Environment (PXE) Flash interface support
SDG 3.0,WfM 3.0 and PC2001 compliant
Wake on LAN support
2.7 PCI Bus Components
2.7.1 PCI Bus Overview
The PCI bus is connected to the components listed below:
ITE IT8211 ATA controller chipset
IT8209R PCI arbiter
PCI edge connector
The PCI bus complies with PCI Local Bus Specification, Revision 2.3 and supports 33MHz
PCI operations.
2.7.2 ITE IT8211 ATA Controller Chipset
The 40-pin IDE connector on the CEGC is connected to the ATA/ATAPI-6 ITE IT8211 ATA
controller chipset, which is then connected to the Intel® ICH9DO Southbridge chipset. The
controller and connector are shown in Figure Error! No text of specified style in
document. -19 below.