Curtiss-Wright FHA5-XE1MWB04-00 User Manual Download Page 4

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SL240 XMC User Guide

.....................................................................................................................................5-6

5.5.2 Fiber-Optic Cables

.................................................................................................................................................5-7

5.6 Troubleshooting

...................................................................................................................................................................1

6 OPERATION

.................................................................................................................................................6-3

6.1 Overview

.................................................................................................................................................6-3

6.2 Theory of Operation

.....................................................................................................................................6-3

6.2.1 Receive Operation

.....................................................................................................................................6-4

6.2.2 Transmit Operation

.....................................................................................................................................6-4

6.2.3 Loop Operation

.................................................................................................................................................6-5

6.3 Data Synchronization

.................................................................................................................................................6-5

6.4 Configuration Options

.....................................................................................................................................6-5

6.4.1 Flow Control

.....................................................................................................................................6-6

6.4.2 Loop Enable

.....................................................................................................................................6-6

6.4.3 Receiver/Transmitter Enable

.....................................................................................................................................6-6

6.4.4 CRC Generation/Checking

.....................................................................................................................................6-6

6.4.5 Stop on Link Error of/SYNC

...................................................................................................................................................................1

7 APPENDIX A

.................................................................................................................................................7-3

7.1 Specifications

.....................................................................................................................................7-3

7.1.1 SL240 XMC with Low Rider Trancseivers

.....................................................................................................................................7-4

7.1.2 SL240 XMC Rear IO

.....................................................................................................................................7-5

7.1.3 SL240 XMC with Pluggable Transceivers

.....................................................................................................................................7-6

7.1.4 XMC Standards

.................................................................................................................................................7-10

7.2 Media Interface Specifications

.....................................................................................................................................7-10

7.2.1 SL100 PCIe Fibre-Optic Media Interface Specifications

.....................................................................................................................................7-10

7.2.2 SL240 PCIe Fibre-Optic Media Interface Specifications

...................................................................................................................................................................1

8 APPENDIX B

.................................................................................................................................................8-3

8.1 Protocol Overview

.................................................................................................................................................8-3

8.2 Ordered Sets Used

.................................................................................................................................................8-5

8.3 Frames

.....................................................................................................................................8-6

8.3.1 Link Bandwidth

.....................................................................................................................................8-6

8.3.2 FPDP Signal Sample Rate

.................................................................................................................................................8-7

8.4 Data Transmission and Flow Control

...................................................................................................................................................................1

9 APPENDIX C

.................................................................................................................................................9-3

9.1 Ordering Information

.....................................................................................................................................9-3

9.1.1 SL240 PCIe Multi-channel Board

Summary of Contents for FHA5-XE1MWB04-00

Page 1: ...Document No F T MU S2XMCFEC A 0 A5 Multi Channel Mezzanine Serial FPDP Card User Guide SL100 SL240 XMC PCIe ...

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Page 3: ...7 4 3 Applications 4 7 4 3 1 LinkXchange GLX4000 Physical Layer Switch 4 8 4 3 2 Typical Digital Signal Processing DSP Imaging System 4 9 4 3 3 Extending FPDP 4 9 4 4 Topologies 4 9 4 4 1 Typical Topologies 4 10 4 4 2 Point to point 4 10 4 4 3 Chained 4 11 4 4 4 Single Master Ring 4 12 4 4 5 Multiple Master Ring 4 12 4 5 Status Link Up LED 1 5 INSTALLATION 5 3 5 1 Procedural Overview 5 3 5 2 Unpac...

Page 4: ...ror of SYNC 1 7 APPENDIX A 7 3 7 1 Specifications 7 3 7 1 1 SL240 XMC with Low Rider Trancseivers 7 4 7 1 2 SL240 XMC Rear IO 7 5 7 1 3 SL240 XMC with Pluggable Transceivers 7 6 7 1 4 XMC Standards 7 10 7 2 Media Interface Specifications 7 10 7 2 1 SL100 PCIe Fibre Optic Media Interface Specifications 7 10 7 2 2 SL240 PCIe Fibre Optic Media Interface Specifications 1 8 APPENDIX B 8 3 8 1 Protocol ...

Page 5: ...h Multimode Fibre Optic Cables 1 10 APPENDIX D 10 3 10 1 FPDP Overview 10 5 10 2 Terminology 10 6 10 3 Parallel FPDP Theory of Operation 10 6 10 3 1 Clock Signals 10 6 10 3 2 Data Framing 10 7 10 4 Serial FPDP Theory of Operation 10 8 10 5 Parallel FPDP Signal Timing ...

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Page 9: ...SL240 XMC PCIe Card 1 FOREWORD ...

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Page 11: ...tiss Wright is a registered trademark of Curtiss Wright This product and all Curtiss Wright LinkXchange products referred to in this document are protected by one or both of the following U S patents 6 751 699 and 5 982 634 CompactFlash is a registered trademark of the Compact Flash Association CFA All Curtiss Wright LinkXchange products referred to in this document are protected by one or both of...

Page 12: ...io and communication devices The user may be in violation of FCC regulations if this device is used in other than the intended market environments CE As a component part of another system this information technology product has no direct function and is therefore not subject to applicable European Union directives for Information Technology equipment Date Change Summery Pg Sec Rev Number 4 12 17 C...

Page 13: ...SL240 XMC PCIe Card 2 INTRODUCTION ...

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Page 15: ...lled network users with at least a systems level understanding of general computer processing memory and hardware operation Style Conventions Called functions are italicized For example OpenConnect Data types are italicized For example int Function parameters are bolded For example Action Path names are italicized For example utility sw cfg File names are bolded For example config c Path file name...

Page 16: ...ations ANSI VITA 17 1998 Revision 1 0 February 11 1999 Produced by the VITA Standards Organization IEC 825 1984 Radiation Safety of Laser Products Equipment Classification Requirements and User s Guide 2 parts 1993 FibreXtreme SL100 SL240 Serial FPDP PCIe NSL Software and API Guide Doc No F T ML S2APINSL A 0 LinkXchange GLX4000 Physical Layer Switch Hardware Reference Manual Doc No F T MR L5XL144 ...

Page 17: ...edures Improve the quality of our operations to meet the needs of our customers suppliers and other stakeholders Provide our employees with the tools and overall work environment to fulfill maintain and improve product and service quality Ensure our customer and other stakeholders that only the highest quality product or service will be delivered The British Standards Institution BSI the world s l...

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Page 19: ...SL240 XMC PCIe Card 3 TECHNICAL SUPPORT ...

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Page 21: ...ou may have specific problems or issues this document does not satisfactorily cover Our goal is to offer a combination of products and services that provide complete easy to use solutions for your application If you have any technical or non technical questions or comments contact us Hours of operation are from 8 00 a m to 5 00 p m Eastern Standard Daylight Time Phone 937 252 5601 or 800 252 5601 ...

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Page 23: ...SL240 XMC PCIe Card 4 PRODUCT OVERVIEW ...

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Page 25: ...o all the above features the SL240 XMC is available in a rugged conduction cooled card and complies with the VITA 42 XMC FRU Field Replaceable Unit VITA 42 also requires that Mezzanine Card information be stored in an on board memory device and that a Compatibility Identification table be published Both can be seen in Appendix A The XMC PCIe basic transmission unit consists of two pairs of conduct...

Page 26: ...VIEW Copyright 2017 Figure 4 1 SL240 XMC Quad Channel Card Air Cooled AC Figure 4 2 SL240 XMC FC Quad Channel and Rear I O Conduction Cooled CC Cards The Rear I O version does not have the optical transceivers shown here as the lower card ...

Page 27: ...x8 Link XMC configuration stored on board Full duplex XMC PCI Express lanes 1 0 or 2 5 Gbps each Automatic lane reversal 8b 10b encoding Link training auto negotiate to smallest link width 256 byte maximum payload size End to end CRC and data processing Advanced error reporting Link management Advanced flow control Turn off unused lanes for power reduction Additional SL240 XMC PCIe Features are Av...

Page 28: ...rt wavelength laser transceiver provides a solution for short reach intersystem connections 300 m such as connecting between cards on the same backplane The SFP transceivers accept a fiber optic cable terminated with a Duplex LC style connector available from most major cable manufacturers For details concerning these connectors contact Curtiss Wright Technical Support Figure 4 3 Pluggable SFP sma...

Page 29: ...transceiver modules RT4000 48 port 4 25 Gbps Retimed accepts optical and copper media SFP transceiver modules RT10000 12 port 10 Gbps accepts optical and copper media Small Form factor Pluggable XFP modules FW1600 48 port IEEE 1394b Firewire copper media ET1000 48 port auto negotiation 10 100 or 1000 Mbps Ethernet with RJ 45 connectors Contact Curtiss Wright Defense Solutions for a complete list P...

Page 30: ...P Imaging System With the support for a 2 5 Gbps link transmission rate between interconnected subsystems the SL240 XMC PCIe is ideal for use in many of today s high throughput data transfer applications Figure 4 4 shows one example Figure 4 4 Typical Applications of SL240 XMC in Advanced DSP Systems ...

Page 31: ... type of transceiver used determines the distance the FPDP cards can be separated See section 5 5 1 Media Options for details on transceivers Using fiber optics provides electrical isolation Figure 4 5 SL240 XMC PCIe Extending FPDP 4 4 Topologies 4 4 1 Typical Topologies There are four typical topologies for the SL240 XMC card These topologies should cover most customer applications If another top...

Page 32: ...at the same time The maximum distance between the between nodes is transceiver dependent see sections 4 2 1 and 5 5 There are many applications for the point to point topology One advantage that point to point has over the other topologies is the ability to do simultaneous bi directional traffic Figure 4 6 Point to Point Topology 4 4 3 Chained This topology is a single transmitter on the end of a ...

Page 33: ...ata This means that if one destination has a failure and stops removing data from its receive FIFO it should be switched out to avoid bringing down the loop A switch suitable for this purpose is the LinkXchange GLX4000 Physical Layer Switch available from Curtiss Wright Software controls mastership switching of the ring There are rules associated with master switching listed in the Programming Int...

Page 34: ...ogy for rings above two nodes and the data cannot be passed through masters unless control guarantees that there is at least one source only node on the ring and that no two masters will transmit at the same time Single master rings should temporarily become multiple master rings when switching loop masters Figure 4 9 Multiple Master Ring 4 5 Status Link Up LED The Link Up LEDs indicate a signal i...

Page 35: ...SL240 XMC PCIe Card 5 INSTALLATION ...

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Page 37: ...XMC card Failure to do this may cause permanent damage to the components on the card Follow the steps below to unpack the card 1 Put on the wristband attached to an anti static mat 2 Remove the card and anti static bag from the carton 3 Place the bag on the anti static mat 4 Open the anti static bag and remove the card 5 In the unlikely event that you should need to return your SL240 XMC card plea...

Page 38: ...all the four mounting screws through the host PCB single board computer to fasten the XMC card in place as shown in step 3 The photos show the air cooled model installation installation for the conduction cooled model is the same with the addition of installing the screws around the thermally conductive rim into the heat sync frame Figure 5 1 SL240 XMC Card Installation To enhance performance in r...

Page 39: ...turers typically supply the mounting screws that attach the XMC card to the stiffening rib As a result no mounting screws are provided with the SL240 XMC card NOTE The user must ensure that proper airflow is supplied to the component side of the card A minimum of 200 CFM is required ...

Page 40: ... inserted into the transmitter receiver connector it may not be possible to clean the connector out and could result in damage to the transmitter or receiver lens Hair dirt and dust can interfere with the light signal transmission Use an alcohol based wipe to clean the cable ends For short wavelength laser modules either a 50 µm or 62 5 µm core diameter cable should be used For distances up to 300...

Page 41: ...ce Please be prepared to supply the following information Machine __________________________________________ OS Name __________________________________________ OS Version __________________________________________ Card Type __________________________________________ Card Serial __________________________________________ Software Part __________________________________________ Software S N ________...

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Page 43: ...SL240 XMC PCIe Card 6 OPERATION ...

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Page 45: ...ware offers many different features for advanced applications while maintaining a simple interface to the most commonly used features NOTE For further explanation of terms used in this chapter refer to the FPDP in Appendix D 6 2 1 Receive Operation The SL240 XMC PCIe has several options for receiving data The most basic option is no loop operation with data receive enabled In this case data is 1 R...

Page 46: ... the same way that multi drop FPDP busses function The fundamental difference between a loop master and a receiving node is the loop master does not have its loop retransmission enabled Therefore to the loop master it appears as if it is still in a point to point connection with a single node Receiving nodes on the other hand have knowledge that they are in a loop configuration and must be configu...

Page 47: ...ttle impact on system performance and provides a mechanism to synchronize the send and receive operations via the link This synchronization process is especially useful at application start up after error conditions and is also useful to verify the error free flow of data during normal operation 6 4 Configuration Options There are many different configuration options available which affect the ope...

Page 48: ...ion Checking option allows the SL240 to detect data transmission errors The card is not capable of correcting the errors Error correction is left to application level design A single bit controls both generation and checking CRC should be used in almost all applications It offers excellent coverage of data errors and has very little impact on link throughput for maximum frame sizes The option of d...

Page 49: ...SL240 XMC PCIe Card 7 APPENDIX A ...

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Page 51: ...rical Requirements 12 volt supply 1 354 A Peak 3 3 volt supply 0 020 A Peak Temperature Requirements Storage 40 to 85 C Operation 40 to 71 C Humidity Range Storage 0 to 95 noncondensing Operating 10 to 90 noncondensing Maximum Node Separation Standard Fiber 300 meters Mean Time Between Failures MTBF SL240 XMC PCIe 4 Channel Short ë lasers 297 272 hours GB 30 C SL240 XMC PCIe 4 Channel Short ë lase...

Page 52: ...s 12 volt supply 1 17 A Peak 3 3 volt supply 0 020 A Peak Temperature Requirements Storage 40 to 85 C Operation 40 to 71 C Humidity Range Storage 0 to 95 noncondensing Operating 10 to 90 noncondensing Mean Time Between Failures MTBF SL240 XMC PCIe 4 Channel Short ë lasers 423 027 hours GB 30 C SL240 XMC PCIe 4 Channel Short ë lasers 24 503 hours AIC 55 C These MTBF numbers are based on calculation...

Page 53: ...Storage 0 to 95 noncondensing Operating 10 to 90 noncondensing Maximum Node Separation Standard Fiber 300 meters Mean Time Between Failures MTBF SL240 XMC PCIe 4 Channel Short ë lasers 297 272 hours GB 30 C SL240 XMC PCIe 4 Channel Short ë lasers 23 917 hours AIC 55 C SL240 XMC PCIe 2 Channel Short ë lasers 349 172 hours GB 30 C SL240 XMC PCIe 2 Channel Short ë lasers 24 207 hours AIC 55 C SL240 X...

Page 54: ...MC connectors Figure A 1 shows a drawing of the XMC connector and Table A 1and A 2 provides the pinout Figure A 1 XMC Mezzanine Connector Table A 1 P15 XMC Connector Pin Definition A B C D E F 1 DP00 DP00 3 3 V DP01 DP01 VPWR 2 GND GND TRST GND GND MRSTI 3 DP02 DP02 3 3 V DP03 DP03 VPWR 4 GND GND TCK GND GND MRSTO 5 DP04 DP04 3 3 V DP05 DP05 VPWR 6 GND GND TMS GND GND 12 V 7 DP06 DP06 3 3 V DP07 D...

Page 55: ... R_TX_3 NC 4 GND GMD NC GND GND NC 5 NC NC NC NC NC NC 6 GND GND NC GND GND NC 7 NC NC NC NC NC NC 8 GND GMD NC GND GND NC 9 NC NC NC NC NC NC 10 GND GND NC GND GND NC 11 R_RX_0 R_RX_0 NC R_RX_1 R_RX_1 NC 12 GND GND NC GND GND GND 13 R_RX_2 R_RX_2 NC R RX_3 R_RX_3 NC 14 GND GND NC GND GND NC 15 NC NC NC NC NC NC 16 GND GND NC GND GND NC 17 NC NC NC NC NC NC 18 GND GND NC GND GND NC 19 NC NC NC NC ...

Page 56: ...s td fabric s Module Siz e 2 bits 0b00 s ingle wide 0b01 double wide P16 Type 2 bits 0b00 s ingle wide 0b01 fabric extens ion 0b01 us er I O P25 Type 2 bits 0b00 not pres ent 0b01 fabric extens ion P26 Type 2 bits 0b00 not pres ent fabric extens ion 0b01 us er I O VITA 42 10 20 bits Field defined by VITA 42 10 3 3 V Power 8 bits 0 unus ed 1 1 50m W 2 51 100m W through 10 451 500m W 11 501 750m W 1...

Page 57: ...Carrier Card produced The un shaded portion of Table A 5 is the required Compatibility Block The shaded portion is added to help identify what each cell in the block specifies Note that columns are duplicated for each connector present on the Mezzanine Card e g P15 P16 Table A 5 Compatibility Block F orm fac t or Standard XMC 3 Connec t ors us ed P15 P16 P rot oc ol us ed XMC PCIe XMC PCIe S i gna...

Page 58: ... Fiber Length 550 m with 50 µm fiber 300 m with 62 5 µm fiber Transmit Wavelength 830 to 860 nm Transmit Power 10 to 4 dBm Receive Wavelength 770 to 860 nm Receive Sensitivity 16 to 0 dBm 7 2 2 SL240 PCIe Fibre Optic Media Interface Specifications Connector Duplex LC 850 nm Media 50 µm or 62 5 µm multimode fiber Maximum Fiber Length 250 m with 50 µm fiber 125 m with 62 5 µm fiber Transmit Waveleng...

Page 59: ...SL240 XMC PCIe Card 8 APPENDIX B ...

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Page 61: ...d Fibre Channel denotes a certain mapping of the transmission words in the 8B 10B protocol to be ordered sets which denote special control information for Fibre Channel These same ordered sets are used in VITA 17 1 but are assigned different meaning There are eighteen ordered sets used by SL240 XMC to denote different information Twelve of these ordered sets are used to embed five bits of data eig...

Page 62: ... 1 SOFn3 SOF Start of Frame PIO1 1 PIO2 1 DIR 0 SOFf SOF Start of Frame PIO1 1 PIO2 1 DIR 1 EOFt SEOF Status EOF FIFO Overflow 0 NRDY 0 EOFdt SEOF Status EOF FIFO Overflow 0 NRDY 1 EOFa SEOF Status EOF FIFO Overflow 1 NRDY 0 EOFn SEOF Status EOF FIFO Overflow 1 NRDY 1 EOFni MEOF Mark EOF EOF for a SYNC frame EOFdti FEOF Frame EOF EOF for a normal data frame R_RDY SWDV SYNC with DATA Valid Says tha...

Page 63: ...DLEs to maintain synchronization SYNC is used to delimit data streams and maintain host program synchronization This signal is under user control for PCI based products and is the same as the FPDP SYNC signal for CMC FPDP based products Whenever a SYNC appears on the output of the Transmit FIFO the current frame is terminated and the proper SYNC frame SYNC with data or SYNC without data is sent Fi...

Page 64: ...and Copy Mode Master bit 1 Without CRC and Copy Mode Master bit 1 SL240 247 10 MB s 247 58 MB s 245 68 MB s 246 15 MB s NOTE The Copy Master Mode is located in the Link Control register 8 3 2 FPDP Signal Sample Rate The states of the FPDP signals PIO1 PIO2 DIR and NRDY are transmitted across the link at varying rates The worst case rate at which these signals are sampled is for CRC checked filled ...

Page 65: ...hen the data waits in the Transmit FIFO until the signal changes Curtiss Wright SL240s use the same protocol when transmitting from either end to allow the link to operate bi directionally Since these data streams are independent the maximum throughput on the link would be 494 MB s 247 MB s direction for SL240 The receiver should transmit the STOP signal when it has space for the data contained in...

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Page 67: ...SL240 XMC PCIe Card 9 APPENDIX C ...

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Page 69: ...wo SFP optical transceivers signaling voltage3 3 V PCI Air cooled FHA7 XE4MWB04 00 SL 240 XMC PCIe x8 form factor with four SFP opticaltransceivers signaling voltage3 3 V PCI Air cooled Table C 2 SL100 SL240 XMC Multi channel Conduction cooled Order Number Description SL100 FHB5 XE1MWB04 CC SL100 XMC 1 0625 Gbs Data Link Card Single Channel Bi Directional 3 3v 850nm LC Connector Conduction Cooled ...

Page 70: ...2LC3001 00 30 meters LC LC FHAC M1LCxxxx 00 FHAC M2LCxxxx 00 Custom LC LC Table C 4 LC to ST Simplex Part Number Duplex Part Number Length Cable End 1 Cable End 2 FHAC M1LCST03 00 FHAC M2LCST03 00 3 meters LC ST FHAC M1LCST05 00 FHAC M2LCST05 00 5 meters LC ST FHAC M1LCST10 00 FHAC M2LCST10 00 10 meters LC ST FHAC M1LCST20 00 FHAC M2LCST20 00 20 meters LC ST FHAC M1LCST30 00 FHAC M2LCST30 00 30 me...

Page 71: ...SL240 XMC PCIe Card 10 APPENDIX D ...

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Page 73: ...not provide the required bandwidth and latency at all times because of bus contention The primary bus must also handle other tasks such as system control The FPDP bus provides a solution to this problem Using FPDP two or more cards are connected by a simple parallel synchronous interface using 80 conductor ribbon cable running across the cards front panels or through a 2 5 Gbps serial interface Fo...

Page 75: ...a rate Some additional advantages of Serial FPDP are Noise immune fiber optic interface Significantly increased transmission distance 10 km Standard cards for parallel FPDP custom backplanes PCI PCI PMC and others available 10 2 Terminology Some FPDP specific terms are defined below FPDP TRANSMIT MASTER FPDP TM An FPDP TM is a device that transmits data and timing signals onto the FPDP bus This de...

Page 76: ...he number of data items in the frame Unframed data may also be transmitted onto the FPDP bus The four data frame types defined by the FPDP specification are listed and described below Unframed data Single frame data Fixed size repeating frame data Dynamic size repeating frame data UNFRAMED DATA Used when the source and the organization of the data is not important Used when the FPDP receivers do n...

Page 77: ...ata frames are the same size when fixed size repeating frame data is transmitted DYNAMIC SIZE REPEATING FRAME DATA Synchronization must occur prior to data to which it applies Synchronization occurs at the same time the last data word in the block before is transferred SYNC must be asserted at the end of the data block while DVALID is still asserted Because synchronization occurs at the end of the...

Page 78: ... R devices The FPDP RM and FPDP R devices must assert NRDY when they are not ready to accept data and must de assert NRDY otherwise The NRDY signal is asynchronous to the STROBE clock and should be double synchronized by the FPDP TM before being used in order to avoid metastability problems As required by the Front Panel Data Port Specifications ANSI VITA 17 1998 the FPDP TM transmits the Data Dir...

Page 80: ...yright 2017 Figure D 3 FPDP Timing Diagrams Showing the Use of Framing The timing parameters from Figure D 2 and D 3 are detailed in Table D 1 and D 2 These timing specifications are taken from Front Panel Data Port Specifications ANSI VITA 17 ...

Page 81: ... DVALID SYNC setup time 6 0 ns min 5 0 ns min TTL 1 Data DVALID SYNC setup time 5 5 ns min 4 5 ns min PECL 2 Data DVALID SYNC hold time 12 8 ns min 11 8 ns min TTL 2 Data DVALID SYNC hold time 12 0 ns min 11 0 ns min PECL Table D 2 FPDP Transmitter Interface Timing Specifications Parameter Description Min Max 3 SUSPEND asserted to data stop 16 clocks 4 SUSPEND de asserted to data started 1 clock ...

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