7. BIOS Setup
70
SPI-8550-LLVAS
Table 7.1.
POST Codes < 4 / 4 >
POST
(hex)
Description
CBh
Redirect Int 13h to Memory Technologies Devices such as ROM, RAM, PCMCIA, and serial
disk
CCh
Redirect Int 10h to enable remote serial video
CDh
Re-map I/O and memory for PCMCIA
CEh
Initialize digitizer and display message
D2h
Unknown interrupt
The following are for boot block in Flash ROM
E0h Initialize
the
chipset
E1h
Initialize the bridge
E2h Initialize
the
CPU
E3h
Initialize system timer
E4h
Initialize system I/O
E5h
Check force recovery boot
E6h Checksum
BIOS
ROM
E7h
Go to BIOS
E8h
Set Huge Segment
E9h
Initialize Multi Processor
EAh
Initialize OEM special code
EBh
Initialize PIC and DMA
ECh Initialize
Memory
type
EDh
Initialize Memory size
EEh
Shadow Boot Block
EFh System
memory
test
F0h
Initialize interrupt vectors
F1h
Initialize Run Time Clock
F2h Initialize
video
F3h
Initialize System Management Mode
F4h
Output one beep before boot
F5h Clear
Huge
Segment
F6h
Boot to Mini DOS
F7h
Boot to Full DOS
* If the BIOS detects error 2C, 2E, or 30 (base 512K RAM error), it displays an additional
word-bitmap (xxxx) indicating the address line or bits that failed. For example, "2C 0002" means
address line 1 (bit one set) has failed."2E 1020" means data bits 12 and 5 (bits 12 and 5 set) have
failed in the lower 16 bits. Note that error 30 cannot occur on 386SX systems because they have a 16
rather than 32-bit bus. The BIOS also sends the bitmap to theport-80 LED display. It first displays
the check point code, followed by a delay, the high-order byte, another delay, and then the low-order
byte of the error. It repeats this sequence continuously.
Summary of Contents for SPI-8550-LLVAS
Page 7: ...vi SPI 8550 LLVAS...
Page 13: ...1 Introduction 6 SPI 8550 LLVAS...
Page 19: ...2 System Reference 12 SPI 8550 LLVAS...
Page 47: ...4 Jumper Setting 40 SPI 8550 LLVAS...