4. Jumper Setting
38
SPI-8550-LLVAS
I/O addresses and instructions
The table below lists I/O addresses for use as COM2.
Table 4.7.
I/O addresses
I/O address
DLAB
Read/Write
Register
W
Transmitter holding Register
THR
0
R Receiver
buffer
Register
RBR
02F8H
1
W
Divisor latch Register (LSB)
DLL
1
W
Divisor latch Register (MSB)
DLM
02F9H
0 W Interrupt
enable
Register
IER
02FAH X
R
Interrupt
ID
Register
IIR
02FBH X
W
Line
control
Register
LCR
02FCH
X
W
Modem Control Register
MCR
02FDH
X
R
Line status Register
LSR
02FEH X
R
Modem
Status
Register
MSR
02FFH X
R/W
Scratch
Register
SCR
RS-422/485 Terminator: JP7
Table 4.8.
RS-422/485 Terminator
JP7
Function
No terminating resister (Default)
terminating resister provided
terminating resister provided
terminating resister provided
terminating resister provided
Terminator
-
CTS for RS-422
RTS for RS-422
RXD for RS-422/485
TXD for RS-422/485
2
4
6
8
1
3
5
7
2
4
6
8
1
3
5
7
2
4
6
8
1
3
5
7
2
4
6
8
1
3
5
7
2
4
6
8
1
3
5
7
Summary of Contents for SPI-8550-LLVAS
Page 7: ...vi SPI 8550 LLVAS...
Page 13: ...1 Introduction 6 SPI 8550 LLVAS...
Page 19: ...2 System Reference 12 SPI 8550 LLVAS...
Page 47: ...4 Jumper Setting 40 SPI 8550 LLVAS...