Contec DAI12-4FITGY User Manual Download Page 36 | Manualshive

Page: 36 / 65

Contec DAI12-4FITGY User Manual Download Page 36

Using the I/O Address Map

DAI12-4(FIT)GY

31

List of Commands

Following is a list of DAI12-4(FIT)GY commands that are issued to "Output port +24":

Table 4.7. List of Commands

No.

HEX

Data size

00

0

Initialization

0-bit

01

1

Masks interrupt source

8-bit

02

2

Sets D/A conversion

8-bit

03

3

Sets output range

8-bit

04

4

Sets internal pacer clock

32-bit

05

5

Starts timer

0-bit

06

6

Stops timer

0-bit

Function

«
...
34
35
36
37
38
...
»

Summary of Contents for DAI12-4FITGY

Page 1: ...F eIT Series Isolated Analog Output Module DAI12 4 FIT GY User s Manual CONTEC CO LTD...

Page 2: ...uration List Module 1 First Step Guide 1 CD ROM F eIT Series Setup Disk 1 1 Interface connector plugs 2 Warranty Certificate 1 Serial number label 1 1 The CD ROM contains various software and User s M...

Page 3: ...ll relevant issues have been considered in the preparation of this document Should you notice an omission or any questionable item in this document please feel free to notify CONTEC CO LTD Regardless...

Page 4: ...ts 7 Setting a Device ID 8 Setup Method 8 LED Indicator 8 3 Connecting to an External Device 9 Interface Connector 9 How to Connect an Interface Connector 9 Signal Layout on the Interface Connector 10...

Page 5: ...Interrupts 34 Clock Mode with Interrupts 37 5 Using the Memory Address Map 43 Module Settings Area 44 Module Information Area 47 Basic Output Data Area 49 Examples 51 6 System Reference 55 Block Diag...

Page 6: ...ations programs setting the switches and connecting the module to external devices Features The output range is common to different channels and can be selected from five output ranges 0 10V 0 5V 10V...

Page 7: ...is connected Functions available with each controller connected 1 For the function available refer to the reference manual for the SVR MMF2 FIT SVR MMF FIT GY 2 Pacer clock setting 10 1 073 741 824 m...

Page 8: ...g on the host computer controls the module by reading writing the memory managed by the controller module For details see Chapter 5 Using the Memory Address Map Control via the Windows driver For the...

Page 9: ...if the device has been tampered with or damaged through abuse mistreatment neglect or unreasonable use or if the original invoice is not included in which case repairs will be considered beyond the wa...

Page 10: ...diately In the event of an abnormal condition or malfunction please consult the dealer from whom the equipment was purchased To avoid electric shock please do not touch the system with a wet hand Do n...

Page 11: ...t data area when the Module is used as a CPU CAxx FIT GY module Chapter 6 System Reference Explains module specifications and circuit block diagrams This equipment has been tested and found to comply...

Page 12: ...f Module Components Figure 2 1 shows the names of module components In the figure the indicated switch settings represent factory settings Figure 2 1 Names of Module Components LED indicator Device ID...

Page 13: ...be distinguished To connect the DAI12 4 FIT GY to the DAI12 4 USB GY assign a device ID between 1 and 3 The factory setting for the Device ID is 0 Setup Method A Device ID can be set by turning the ro...

Page 14: ...utton after the wire is inserted to fix the cable Compatible wires are AWG 28 20 Figure 3 1 Connecting an Interface Connector and Connectors That Can Be Used Note Removing the connector plug by graspi...

Page 15: ...Voltage output 0 Analog Output Current output 0 Analog Ground Analog Output Voltage output 1 Analog Output Current output 1 Analog Ground Not connected Not connected Not connected Not connected Not c...

Page 16: ...sed in situations where the module is at a relatively large distance from the external device or when the noise immunity of the module must be improved In this case the voltage output and the analog g...

Page 17: ...tached when the power for the module or the external device is on The maximum current capacity for a voltage output signal is 5mA To avoid any malfunction do not connect an external device that genera...

Page 18: ...ower supply 17 24V In such a case a power supply with a small ripple should be used in order to avoid an adverse impact on the conversion accuracy due to a large power supply ripple The load resistanc...

Page 19: ...ble Figure 3 8 Connecting to a Fixed Load Coaxial Cable Notes When the power is turned on or the module is reset the current output signal will be 0 mA To avoid any malfunction the current output sign...

Page 20: ...80h or 08C0h will be used as a starting I O address Table 4 1 List of Starting I O Addresses ID No Occupied I O address 0 0800h 081Fh recommended 0840h 085Fh 0880h 089Fh 08C0h 08DFh 1 1800h 181Fh reco...

Page 21: ...0 00h 1 01h 2 02h Not available 31 1Fh 22 16h 3 03h 21 15h 23 17h Product ID Number Product Category Interrupt Status Revision Data Enable 0 0 0 IRQ9 IRQ7 IRQ5 Status 0 0 0 0 0 0 0 1 1 0 0 0 Revision...

Page 22: ...img Data 18 Settimg Data 17 Settimg Data 16 Settimg Data 2 Settimg Data 31 Settimg Data 30 Settimg Data 29 Settimg Data 28 Settimg Data 27 Settimg Data 26 Settimg Data 25 Settimg Data 24 Settimg Data...

Page 23: ...duct Category Product ID Number D7 D0 This is the product ID within the same product category For the DAI12 4 FIT GY the product ID is 1h Following are examples of the initialization that is performed...

Page 24: ...interrupt level that is currently set The current interrupt level is indicated as 1 Following are examples of the initialization that is performed in high level languages Microsoft C Microsoft QBASIC...

Page 25: ...output mode updates the analog output from a specified channel immediately after output data is set The synchronous output mode pre sets output data to the channels on which analog output is to be upd...

Page 26: ...effected in high level languages Microsoft C Microsoft QBASIC outp ADR 24 0x0 OUT ADR 24 H0 Setting D A Conversion Conditions This step sets D A conversion conditions In terms of procedures first a D...

Page 27: ...This option is set only if the clock mode is selected as a D A conversion mode Pacer Clock 0 Internal Pacer Clock Initialized state 1 Reserved D A conversion mode D0 This step sets the timing for D A...

Page 28: ...Range and Setup Data Following are examples in which an output range is specified in high level languages The example involves setting an output range of 0 10V Microsoft C Microsoft QBASIC outp ADR 24...

Page 29: ...ssion D A conversions in accurate cycles cannot be performed if the specified value is less than the conversion time for a specified number of channels The internal pacer clock setting control port as...

Page 30: ...hannels should be specified in the following order channel specification D A conversion data low bytes D A conversion data high bytes Figure 4 12 Setting a Conversion Channel All channels D7 Assigning...

Page 31: ...Microsoft C Microsoft QBASIC outp ADR 24 0x2 OUT ADR 24 H2 outp ADR 28 0x5 OUT ADR 28 H5 outp ADR 18 0x00 OUT ADR 18 H00 outp ADR 16 LowerData0 OUT ADR 16 LowerData0 outp ADR 17 UpperData0 OUT ADR 17...

Page 32: ...ages Microsoft C Microsoft QBASIC while inp ADR 22 1 WHILE INP ADR 22 AND 1 1 WEND outp ADR 18 0x0 OUT ADR 18 H0 outp ADR 16 LowerData OUT ADR 16 LowerData outp ADR 17 UpperData OUT ADR 17 UpperData 2...

Page 33: ...the D A converter is converted into analog signals This bit is cleared when 1 is set to the End of Conversion Status of the analog output status reset port The end of conversion does not include analo...

Page 34: ...e hardware interrupt function For interrupt levels a level that is set by the Module will be used When using the interrupt function you can pre select one of the following status conditions as an inte...

Page 35: ...t is masked when the value 0 is output the port is set as an interrupt source 1 Masked Initialized state 0 Interrupt Request Enable Following are examples in which a timer cycle is set in high level l...

Page 36: ...ommands that are issued to Output port 24 Table 4 7 List of Commands No HEX Data size 00 0 Initialization 0 bit 01 1 Masks interrupt source 8 bit 02 2 Sets D A conversion 8 bit 03 3 Sets output range...

Page 37: ...tware Mode Flowchart Figure 4 16 Software Mode Can data be set Set channel Set D A data D A conversion finished Final channel End No No No Yes Yes Yes Set output range Set D A conversion conditions St...

Page 38: ...0x0c unsigned char LowerData 0x00 unsigned char i float VDAT outp ADR 0x18 0x00 Initialize outp ADR 0x18 0x02 D A Conversion Mode outp ADR 0x1c 0x00 Software outp ADR 0x18 0x03 Range outp ADR 0x1c 0x...

Page 39: ...A data D A conversion finished Clock error End No No No Yes Yes Yes Stop timer Number of set data points Reset the status Yes 1 No Yes Set output range Set D A conversion conditions Start Initializat...

Page 40: ...unsigned char UpperData NUM LowerData NUM sts unsigned char i j unsigned int VDAT float Volt NUM outp ADR 0x18 0x00 Initialize outp ADR 0x18 0x02 D A Conversion Mode outp ADR 0x1c 0x05 Software outp A...

Page 41: ...UM i do sts unsigned char inp ADR 0x16 while sts 0x02 0x02 printf 0 to 3ch 02x 02x 7 3f V UpperData i LowerData i Volt i for j 0 j CH j Set Initial Data do sts unsigned char inp ADR 0x16 while sts 0x0...

Page 42: ...sion data Start timer Show data Reset the interrupt level Reset the interrupt vector No Yes Stop timer End of interrupt Set initial D A data Set channel Can data be set Set an interrupt level Start In...

Page 43: ...gned int DaData CH NUM D A Data volatile int intcnt 0 interrupt counter volatile int IrqLevel IRQ5 interrupt level volatile int Irqsts interrupt level int OrgMasterImr OrgSlaveImr original IMR unsigne...

Page 44: ...d ChgVect void OrgVect _dos_getvect IntVector IrqLevel _disable _dos_setvect IntVector IrqLevel inthandler if IrqLevel IRQ7 IMR and mask clear outp 0x21 OrgMasterImr inp 0x21 0xfb outp 0xa1 OrgSlaveIm...

Page 45: ...Data i intcnt 8 0xff LowerData unsigned char DaData i intcnt 0xff outp ADR 0x10 LowerData Set Lower Data outp ADR 0x11 UpperData Set Upper Data sts unsigned char inp ADR 0x16 outp ADR 0x16 sts Status...

Page 46: ...DaData i 0 0xff outp ADR 0x10 LowerData Set Lower Data outp ADR 0x11 UpperData Set Upper Data outp ADR 0x2 IntEnable IrqLevel interrupt level outp ADR 0x18 0x05 Timer Start while intcntnow NUM printf...

Page 47: ...Using the I O Address Map 42 DAI12 4 FIT GY...

Page 48: ...le manual Following is an explanation of the memory areas necessary for the use of the DAI12 4 FIT GY the module settings area the module information area and the basic output data area Module Setting...

Page 49: ...1 R 00 0 channel Starting address 05 Basic input data size 1 R 00 0 bytes Starting address 06 Number of basic output channels 1 R 04 4 channels Starting address 07 Basic output data size 1 R 02 2 byte...

Page 50: ...our analog output channels are provided Basic output data size The DAI12 4 FIT GY has a basic output data size of 2 bytes 02h Of the 16 bit data area the DAI12 4 FIT GY uses 12 bits Input channel sett...

Page 51: ...e module settings area always remain 00h The error status on a module is stored in the module information area Analog output resolution The analog output resolution capacity of the DAI12 4 FIT GY is f...

Page 52: ...asic output channels 1 R 04 Starting address 07 Basic output data size 1 R 02 Starting address 08 Input channel settings address 1 R 20 Starting address 09 Input channel settings data size 1 R 06 Star...

Page 53: ...e module The error status register is reset when the module is restarted 00h Normal status 21h Module timeout The module timeout status 21h is an error status that does not usually occur and indicates...

Page 54: ...dress 05 CH2 Analog output value 2 R W Starting address 06 Starting address 07 CH3 Analog output value 2 R W Starting address 08 Starting address 7F Reserved 120 R Analog output value Analog output va...

Page 55: ...5 7FF 10 000 0000 Notes For analog output values valid data is output during the operation of the module When the module is shut down the analog input values are undefined An analog output value is 2...

Page 56: ...n module startup register Set analog input range Analog module type No Yes Set analog output range Address Analog output range is written to address 30101Bh Default is 00h Analog output range 10V 10V...

Page 57: ...ULE_START 0x10 define FIT_ERROR_STATUS 0x11 Information Common define FIT_PRODUCT_DIGITAL 0x01 define FIT_PRODUCT_ANALOG 0x02 define FIT_PRODUCT_COUNTER 0x03 define FIT_MODULE_START_OFF 0x00 define FI...

Page 58: ...egory dwVaBase FIT_IO FIT_IO_DEVICE_CONFIG wStatus FIT_Read hHandle dwVaBase dwVaOffset FIT_PRODUCT_CATEGORY 1 byCategory if wStatus 0 printf Error FIT_Read 04X H n wStatus FIT_Close hHandle return 1...

Page 59: ...Count 2 dwVaBase FIT_IO FIT_IO_OUTPUT wStatus FIT_Write hHandle dwVaBase dwVaOffset 2 4 BYTE byData 0 if wStatus 0 printf Error FIT_Write 04X H n wStatus Read Error Status dwVaBase FIT_IO FIT_IO_DEVIC...

Page 60: ...ystem Reference Block Diagram Figure 6 1 Circuit Block Diagram Stack Connector Control Circuit Device ID Interface Connector CH0 CH1 Interface Connector CH2 CH3 D A Converter DC DC Converter Voltage C...

Page 61: ...mm DIN rails standard connection mechanism provided in the system Applicable wire AWG 28 20 Applicable plug FK MC 0 5 12 ST 2 5 made by PHOENIX CONTACT Corp 1 When the environment temperature is near...

Page 62: ...noise AC line 2kV Signal line 1kV IEC1000 4 4Level 3 EN61000 4 4Level 3 Static electricity resistance Contact discharge 4kV IEC1000 4 2Level 2 EN61000 4 2Level 2 Atmospheric discharge 8kV IEC1000 4 2...

Page 63: ...System Reference 58 DAI12 4 FIT GY External Dimensions Figure 6 2 External dimensions 1 2 94 0 25 2 64 7 4 0 3 5 1 2 mm 14 0 35 0 45 0 14 0 31 5...

Page 64: ......

Page 65: ...31 Himesato Nishiyodogawa ku Osaka 555 0025 Japan https www contec com No part of this document may be copied or reproduced in any form by any means without prior written consent of CONTEC CO LTD 1215...

Reviews:

No comments