Using the I/O Address Map
26
DAI12-4(FIT)GY
- Final channel [D6]:
This option is enabled when the synchronous output mode is on.
Assigning the value "1" to this bit specifies the final channel for which the D/A
conversion data to be specified in the following step is valid.
Channels for which D/A conversion data can be valid are channels 0 through the
final channel.
Following are examples where data is output synchronously from channels 0 and 1:
Microsoft C
Microsoft QBASIC
outp( ADR+24, 0x2 );
OUT ADR+24, &H2
outp( ADR+28, 0x5 );
OUT ADR+28, &H5
outp( ADR+18, 0x00 );
OUT ADR+18, &H00
outp( ADR+16, LowerData0 );
OUT ADR+16, LowerData0
outp( ADR+17, UpperData0 );
OUT ADR+17, UpperData0
outp( ADR+18, 0x41 );
OUT ADR+18, &H41
outp( ADR+16, LowerData1 );
OUT ADR+16, LowerData1
outp( ADR+17, UpperData1 );
OUT ADR+17, UpperData1
Setting Conversion Data
Conversion data is specified in offset binary. The relationship between conversion
data and analog output is indicated by the following formula:
(v offset)
span
Data
=
×2
12
Table 4.4. Output Range
Output range
Offset
Span
-10V - +10V
10
20
-5V - +5V
5
10
0V - +10V
0
10
0V - +5V
0
5
0mA - +20mA
0
20