RC56D, RC336D, and RC144D Modem Device Sets Designer’s Guide
5-2
Conexant
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and status signals routed through it. A DAA section is also governed by local government regulations covering subjects
such as component spacing, high voltage suppression, and current limiting.
3. Once sections have been roughly defined, place the components starting with the connectors and jacks.
a) Allow sufficient clearance around connectors and jacks for mating connectors and plugs.
b) Allow sufficient clearance around components for power and ground traces.
c) Allow sufficient clearance around sockets to allow the use of component extractors.
4. First, place the mixed analog/digital components (e.g., MDP, A/D converter, and D/A converter).
a) Orient the components so pins carrying digital signals extend onto the digital section and pins carrying analog
signals extend onto the analog section as much as possible.
b) Position the components to straddle the border between analog and digital sections.
5. Place all analog components.
a) Place the analog circuitry, including the DAA, on the same area of the PCB.
b) Place the analog components close to and on the side of board containing the TXA1, RIN, VC, and VREF signals.
c) Avoid placing noisy components and traces near TXA1, RIN, VC, and VREF lines.
d) RBIAS is extremely sensitive to noise; ensure that leads are short and are separated from noise sources, especially
digital signals.
e) For serial DTE models, place receivers and drivers for DTE EIA/TIA-232-E serial interface signals close to the
connectors and away from traces carrying high frequency clocks in order to avoid/minimize the addition of noise
suppression components (i.e., chokes and capacitors) for each line.
6. Place active digital components/circuits (including MCU) and decoupling capacitors.
a) Place digital components close together in order to minimize signal trace length.
b) Place 0.1 µF decoupling (bypass) capacitors close to the pins (usually power and ground) of the IC they are
decoupling. Make the smallest loop area possible between the capacitor and power/ground pins to reduce EMI.
c) For parallel host bus models, place host bus interface components close to the edge connector in accordance with
the applicable bus interface standard, e.g., use a 2.5-in maximum trace length for PC bus interface.
d) For serial DTE models, place serial DTE interface components near the DTE connector.
e) Place crystal circuits as close as possible to the devices they drive.
7. Provide a “connector” component, usually a zero ohm resistor or a ferrite bead at one or more points on the PCB to
connect one section’s ground to another.
5.1.3 Signal Routing
1. Route the modem signals to provide maximum isolation between noise sources and noise sensitive inputs. When layout
requirements necessitate routing these signals together, they should be separated by neutral signals. The noise source,
neutral, and noise sensitive pins are listed in Table 5-4.
2. Keep digital signals within the digital section and analog signals within the analog section. (Previous placement of
isolation traces should prevent these traces from straying outside their respective sections.) Route the digital traces
perpendicular to the analog traces to minimize signal cross coupling.
3. Provide isolation traces (usually ground traces) to ensure that analog signals are confined to the analog section and
digital traces remain out of the analog section. A trace may have to be narrowed to route it though a mixed analog/digital
IC, but try to keep the trace continuous.
a) Route an analog isolation ground trace, at least 50 mil to 100 mil wide, around the border of the analog section; put
on both sides of the PCB.
b) Route a digital isolation ground trace, at least 50 mil to 100 mil wide, and 200 mil wide on one side of the PCB edge,
around the border of the digital section.
4. Keep host interface signals (e.g., ~HCS, ~HRD, ~HWT, and ~RESET) traces at least 10 mil thick (preferably 12 - 15 mil).
Summary of Contents for RC144D
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