RC56D, RC336D, and RC144D Modem Device Sets Designer’s Guide
1154
Conexant
5-5
b) Route the connection from the negative terminal of 10
µ
F VREF capacitor and the other terminal of the 0.1
µ
F VREF
capacitor to the MDP VC pin with a single trace isolated from the trace to the VC pin from the VC ferrite bead. (see
Step c).
c) Route the connection from the plus terminal of the 10
µ
F VC capacitor and one terminal of a the 0.1
µ
F VC capacitor
to the MDP VC pin through a VC ferrite bead and from the VC ferrite bead to the VC pin with a single trace isolated
from the trace to the VC pin from the VREF capacitors (see Step b).
d) Route the connection from the negative terminal of the 10
µ
F VC capacitor and the other terminal of the 0.1
µ
F VC
capacitor to DGND with a single trace.
e) Route the connection from the VC pin to the DAA through a ferrite bead.
5.1.11 Telephone and Local Handset Interface
1. Place common mode chokes in series with Tip and Ring for each connector.
2. Decouple the telephone line cables at the telephone line jacks. Typically, use a combination of series inductors, common
mode chokes, and shunt capacitors. Methods to decouple telephone lines are similar to decoupling power lines,
however, telephone line decoupling may be more difficult and deserves additional attention. A commonly used design aid
is to place footprints for these components and populate as necessary during performance/EMI testing and certification.
3. Place high voltage filter capacitors (.001 µF @1KV) from Tip and Ring to digital ground.
5.1.12 Optional Configurations
Because fixed requirements of a design may alter EMI performance, guidelines that work in one case may deliver little or no
performance enhancement in another. Initial board design should, therefore, include flexibility to allow evaluation of optional
configurations. These optional configurations may include:
1. Chokes in Tip and Ring lines replaced with jumper wires as a cost reduction if the design has sufficient EMI margin.
2. Various grounding areas connected by tie points (these tie points can be short jumper wires, solder bridges between
close traces, etc.).
3. EIA/TIA-232 cable ground wire or cable shielding connected on the board or floated.
4. Develop two designs in parallel; one based on a 2-layer board and the other based on a 4-layer board. During the
evaluation phase, better performance of one design over another may result in quicker time to market.
5.1.13 MDP Specific
1. Locate the MDP device and all supporting analog circuitry, including the data access arrangement, on the same area of
the PCB.
2. Locate the analog components close to and on the side of board containing the TXA1, TXA2, RIN, TELIN, TELOUT,
MICM, MICV, and SPK signals.
3. Avoid placing noisy components and traces near the TXA1, TXA2, RIN, TELIN, TELOUT, MICM, MICV, and SPK lines.
4. Locate receivers and drivers for DTE EIA/TIA-232-E serial interface signals close to the connectors and away from traces
carrying high frequency clocks in order to avoid/minimize the addition of noise suppression components (i.e., chokes and
capacitors) for each line.
5. Route MDP modem interconnect signals by the shortest possible route avoiding all analog components.
6. Provide an RC network on the +5VA supply in the immediate proximity of the +5VA pin to filter out high frequency noise
above 115 kHz. A tantalum capacitor is recommended (especially in a 2-layer board design) for improved noise immunity
with a current limiting series resistor or inductor to the +5V supply which meets the RC filter frequency requirements.
7. Provide a 0.1 µF ceramic decoupling capacitor to ground between the high frequency filter and the VAA pin.
8. Provide a 0.1 µF ceramic decoupling capacitor to ground between the +3.3V supply and the VDD pin.
5.2 DAA TRANSFORMER CONSIDERATION
Transformer selection for RC56 designs is extremely critical, less critical for RC336 designs, and even less critical for RC144
designs. For RC56 designs, use transformers with low leakage inductance and high core impedance. Avoid transformers with
low core impedance which have a strong shunting effect on low frequencies (<300 Hz). Also avoid “wet” transformers which
conduct DC current.
Summary of Contents for RC144D
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