Schematic Diagrams
B - 8 Cantiga 3/7
B.Schematic Diagrams
Cantiga 3/7
3 . 3V S
2, 3 ,6, 10 , 12 , 13 , 14, 15, 16, 17 , 18 , 19 , 20, 22, 23, 24 , 25 , 26 , 27, 28, 32, 33 , 36 , 37
MC H_TSATN #
R10 8
* 4. 02K_ 1%_0 6
R35 2
* 20 _1% _06
MC H _C L_ VR EF
M_CLK_D D R0 # 12
M_CLK_D D R3 1 3
D FG T_V ID _ 4 32
R 1 15
*1 0mil_ s hor t
R 92
*10 mil_s ho rt
Zo=
55£[¡Ó15%
D MI_R XP0 16
C L_D ATA0 1 7
C L_C LK0 17
D MI_R XP2 16
S M_ PW R OK
PM_E XTTS0 #
MCH _ C FG_15
R 118
1K_1% _04
C LK _D R EFS S# 2
D FG T_V ID _ 3 32
PCI express graphics lane
reverse option for layout
convenience
D MI_TXN3 16
1 . 8V
9, 10, 12 , 13 , 31
MC H_ C FG_7
R98
10 K_ 04
M_CK E2
13
1 . 05VS
2, 3 ,4,5, 10, 15, 18 , 28 , 29
D FG T_V ID _ 0 32
R 1 11
1K_1% _04
MC H _I C H _SY N C # 17
PM_ EXTTS0 #
D D R3 _DR AMR ST#
R 107
*2 .21 K_ 1% _0 4
SM_RC O MP_ VO H
C LK _D R EFS S#
R 89
*2 .21 K_ 1% _0 4
PM_E XTTS1#
1 2, 1 3
R 96
*2 .21 K_ 1% _0 4
12 10
SDVO/DP/iHDMI
Concurrent with PCIe
MCH _ C FG_16
R3 50
3. 0 1K _1 %_ 04
MC H _ BSEL 0
2
MCH _ C FG_10
MCH _ C FG_3
M_CK E0
12
ME TLS
Confidentiality
MC H _C FG_ 20
M_CK E1
12
M_CS 1#
12
MC H_ C FG_16
MCH_CFG_12
MCH_CFG_13
clock un-gating
M_CS 3#
13
MCH _ C FG_8
MCH _ C FG_11
R 99
*10 mil_s ho rt
R 6 9
2.2K_0 4
C LK _D R EF
MCH _ C FG_14
1105
M_CS 0#
12
PM_D PR SLP VR
1 7,3 3
MCH _ C FG_4
R 113
2. 2K_1% _04
MC H_ C FG_5
3.3 VS
MCH _ C FG_5
MC H _H D A_SD O
R 70
*2 .21 K_ 1% _0 4
C48 5
2. 2 U_ 6.3 V_ 06
M_CLK_D D R1 # 12
MC H _C L KR EQ# 2
C LK _D R EFS S 2
SM_RC O MP
MC H _H D A_BC LK
1031
C48 6
2. 2 U_ 6.3 V_ 06
0314 D03
PM_BMBU SY #
1 7
D MI_R XN2 16
C LK_P CI E_ 3GP LL 2
R35 1
8 0.6_ 1% _0 6
PM_E XTTS1 #
SM_R C O MP _V OL
MCH _ C FG_7
DMI X2 select Low= DMI x 2
High=DMI x 4 (default)
R35 3
8 0.6_ 1% _0 6
MCH _ C FG_13
MCH _ C FG_18
R 11 4
1 00 _0 4
MCH_CFG_10
PCIE Loopback enable
C LK _D R EF# 2
C 47 8
. 01U _ 16V_X7R _04
M_OD T2
13
M_OD T3
13
C 72 3
.1 U _ 16 V_ X7R _ 04
MC H _HD A_SY N C 1 5
SM_R C O MP _V OH
PL T_ R ST#
1 6
MC H _C LKR EQ#
PM_ EXTTS1 #
D DP C_C TRL C LK
R 77
*2 .21 K_ 1% _0 4
MC H _HD A_SD O 15
MC H_ C FG_10
C 1 20
. 1U_1 0V_X7R _0 4
MC H _ TS ATN #
1 . 8V
M_CLK_D D R1 1 2
DE LA Y_PW R G D
1 7, 3 3
SM_PW R OK
MC H _C FG_ 19
SM_RE XT
M_CLK_D D R0 1 2
H DMI C _S CL 3 6
1 . 05VM
9, 10, 28 , 30 , 32
C LK _D R EF 2
D DP C_C TRL D ATA
MC H _H D A_SD I
R 88
*2 .21 K_ 1% _0 4
M_OD T0
12
C L_R ST# 0 17
D MI_R XN0 16
MC H _H D A_R ST# 15
SM_RC O MP#
MCH _ C FG_20
MC H _H D A_RS T#
MCH _ C FG_19
R 117
1K_1% _04
Add 0.1uF capacitor on this
rail close to (G)MCH.
M_CLK_D D R3 # 13
FSB Dynamic ODT
MC H _H D A_BC L K 15
Z07 02
MPW R OK 1 4, 1 7, 27
M_CK E3
13
D MI_TXP1 16
D FG T_V R_EN 3 2
MCH _ C FG_12
C 47 9
. 0 1U _1 6V _X7R_0 4
R3 59
1K_1% _04
H DA _S DI N 2 15
Z070 1
M_CLK_D D R2 1 3
D MI_R XN1 16
D FG T_V ID _ 1 32
Zo=
55£[¡Ó15%
D MI_R XP1 16
M_V RE F_MC H
0324 D3
R10 1
* 4. 02K_ 1%_0 6
D MI_TXP2 16
D MI_TXN1 16
R 3 49
4 99_ 1% _0 4
R91
10 K_ 04
R 1 12
51 1_ 1%_04
D FG T_V ID _ 2 32
D MI_R XP3 16
MC H_ C FG_13
MC H _I C H_ SY N C #
MCH _ C FG_6
R35 4
* 20 _1% _06
Zdiff=
70£[¡Ó20%
MC H _ BSEL 1
2
3. 3V S
D MI_TXN0 16
SM_RC O MP_ VO L
R 32 1
54 .9 _1% _04
3. 3 VS
C LK _D R EF#
1.05 VM
C LK _D R EFS S
0314 D03
C LK_P CI E_ 3GP LL# 2
The Daisy chain topology should be
routed from ICH9M to Intel MVP , then
to (G)MCH and CPU, in that order.
M_CLK_D D R2 # 13
MC H_ C FG_12
MC H _ BSEL 2
2
H DMI C_ SC L
D MI_TXN2 16
DMI lane reversal
R 3 09
2.2K_0 4
MCH _ C FG_9
1 . 8V
ON BOARD VGA HDMI
PM_TH R MTR I P#
3 ,1 5,2 9
Z07 04
M_OD T1
12
D MI_R XN3 16
H DMI C _S DA 3 6
D D PC _C TR LD ATA
MC H _ CF G_6
R 3 12
*2 .2K_0 4
H _ DP RS TP #
3 , 15, 33
R 6 8
2.2K_0 4
0314 D03
M_CS 2#
13
H DMI C_ SD A
MC H_ C FG_9
MCH _ C FG_17
MC H _H D A_SY NC
D MI_TXP3 16
R3 58
1K _1%_ 04
D MI_TXP0 16
1. 8V
1. 05V S
D D PC _C TR LC L K
R 65
*2 .21 K_ 1% _0 4
PM
M
ISC
NC
DDR CLK/ CONT
ROL/
COMPE
NSAT
ION
CL
K
DMI
CFG
RSVD
GRAP
HICS VID
ME
HDA
U 16 B
C AN TI GA
AP2 4
AT21
AV2 4
AR 24
AR 21
AU 24
BC 28
AY 28
AY 36
BB3 6
BA1 7
AY 16
AV1 6
AR 13
BC 36
BD 17
AY 17
BF1 5
AY 13
BG22
BH 21
P 29
R 28
P 25
T25
R 25
T28
P 20
P 24
C 25
N 24
M24
E 21
C 23
C 24
N 21
P 21
T21
R 20
M20
L 21
H 21
R 29
N 33
P 32
AT40
AT11
B38
A38
E41
F41
AE4 1
AE3 7
AE4 7
AH 39
AE4 0
AE3 8
AE4 8
AH 40
AE3 5
AE4 3
AE4 6
AH 42
AD 35
AE4 4
AF4 6
AH 43
AL 34
AN 35
AK 34
AM35
BG 23
BF 23
BH 18
BF 18
B7
AU 20
AV2 0
AY 21
A H9
AH 10
AH 12
AH 13
M36
N 36
R 33
T33
B33
B32
G33
F33
C 34
BF2 8
BH 28
T20
R 32
K 12
AH 37
AH 36
AN 36
AJ 35
AH 34
A 47
BG 48
BF 48
BD 48
BC 48
BH 47
BG 47
BE 47
BH 46
BF 46
BG 45
BH 44
BH 43
B H6
B H5
B G4
G36
E36
K36
T24
H 36
B12
E43
F43
B H3
E33
B 31
N 28
BF3
B H2
B G2
BE2
B G1
BF1
B D1
B C1
F1
AV4 2
AR 36
BF1 7
M1
B28
B30
B29
C 29
A28
M28
B2
SA_C K_0
SA_C K_1
SB_C K_0
SA _C K# _0
SA _C K# _1
SB _C K# _0
SA_ C KE_0
SA_ C KE_1
SB_ C KE_0
SB_ C KE_1
SA _C S# _0
SA _C S# _1
SB _C S# _0
SB _C S# _1
SM_D R AMR ST#
SA_ ODT_0
SA_ ODT_1
SB_ ODT_0
SB_ ODT_1
S M_R C OMP
SM_R C O MP #
C FG_ 18
C FG_ 19
C FG_ 2
C FG_ 0
C FG_ 1
C FG_ 20
C FG_ 3
C FG_ 4
C FG_ 5
C FG_ 6
C FG_ 7
C FG_ 8
C FG_ 9
C FG_ 10
C FG_ 11
C FG_ 12
C FG_ 13
C FG_ 14
C FG_ 15
C FG_ 16
C FG_ 17
P M_SY N C #
P M_EXT_TS# _0
P M_EXT_TS# _1
P W ROK
R STI N #
DP LL_ R EF_ CL K
D PLL_R EF_C LK #
D PL L_R EF _SS CL K
D P LL _RE F_SSC LK #
D MI _ R XN _0
D MI _ R XN _1
D MI _ R XN _2
D MI _ R XN _3
D MI _R XP_0
D MI _R XP_1
D MI _R XP_2
D MI _R XP_3
D MI_ TXN _ 0
D MI_ TXN _ 1
D MI_ TXN _ 2
D MI_ TXN _ 3
DMI _TXP_ 0
DMI _TXP_ 1
DMI _TXP_ 2
DMI _TXP_ 3
R SV D10
R SV D12
R SV D11
R SV D13
R SV D22
R SV D23
R SV D24
R SV D25
P M_D PR STP#
SB_C K_1
SB _C K# _1
R SV D20
R SV D5
R SV D6
R SV D7
R SV D8
R SV D1
R SV D2
R SV D3
R SV D4
GFX_V ID _ 0
GFX_V ID _ 1
GFX_V ID _ 2
GFX_V ID _ 3
GFX_ VR _E N
SM_RC O MP_ VO H
SM_RC OMP_ VOL
TH ER MTR I P#
D PR SLPV R
R SV D9
CL_ CL K
C L _D ATA
C L _PW RO K
C L_R ST#
C L_VR EF
N C _26
N C _1
N C _2
N C _3
N C _4
N C _5
N C _6
N C _7
N C _8
N C _9
N C _10
N C _11
N C _12
N C _13
N C _14
N C _15
SD VO_ C TR L CL K
SD VO_CTR LD ATA
C L KR EQ #
R SV D14
I C H_SY N C #
TSATN #
PE G_C LK #
PEG_ CL K
N C _16
GFX_V ID _ 4
R SV D15
DD PC _ C TR L CL K
N C _17
N C _18
N C _19
N C _20
N C _21
N C _22
N C _23
N C _24
N C _25
SM_VR EF
SM_PW RO K
S M_R EXT
R SV D17
H D A_B CL K
HD A_R ST#
H D A_ SD I
H D A_ SD O
H D A_ SY N C
D D PC _CTR LD ATA
R SV D16
R 322
3 3_0 4
Sheet 8 of 48
Cantiga 3/7
Summary of Contents for L390T
Page 1: ......
Page 2: ......
Page 3: ...Preface I Preface LCD Computer L390T Service Manual...
Page 26: ...Introduction 1 12 1 Introduction...
Page 51: ...Part Lists LCD L390T A 3 A Part Lists LCD L390T 3 Figure A 1 LCD L390T...
Page 52: ...Part Lists A 4 Stand L390T A Part Lists Stand L390T Figure A 2 Stand L390T...
Page 53: ...Part Lists Back Fan 1 L390T A 5 A Part Lists Back Fan 1 L390T Figure A 3 Back Fan 1 L390T...
Page 54: ...Part Lists A 6 Back Fan 2 L390T A Part Lists Back Fan 2 L390T Figure A 4 Back Fan 2 L390T...
Page 55: ...Part Lists DVD L390T A 7 A Part Lists DVD L390T Figure A 5 DVD L390T...
Page 56: ...Part Lists A 8 Combo L390T A Part Lists Combo L390T Figure A 6 Combo L390T...