Cirrus Logic CS4525, Manual

Page: 7 / 98

DS726PP2 7
CS4525
Figure 17.Peak Signal Detection & Limiting .............................................................................................. 37
Figure 18.Foldback Process ..................................................................................................................... 40
Figure 19.Popguard Connection Diagram ................................................................................................. 46
Figure 20.2-Channel Full-Bridge PWM Output Delay ............................................................................... 50
Figure 21.3-Channel PWM Output Delay .................................................................................................. 50
Figure 22.Typical SYS_CLK Input Clocking Configuration ....................................................................... 54
Figure 23.Hardware Mode PWM Output Delay ......................................................................................... 55
Figure 24.Hardware Mode Digital Signal Flow .......................................................................................... 56
Figure 25.Foldback Process ..................................................................................................................... 57
Figure 26.Output Filter - Half-Bridge ......................................................................................................... 59
Figure 27.Output Filter - Full-Bridge .......................................................................................................... 60
Figure 28.Recommended Unity Gain Input Filter ...................................................................................... 61
Figure 29.Recommended 2 V
RMS
Input Filter ........................................................................................... 61
Figure 30.I²S Serial Audio Formats ........................................................................................................... 62
Figure 31.Left-Justified Serial Audio Formats ........................................................................................... 62
Figure 32.Right-Justified Serial Audio Formats ......................................................................................... 63
Figure 33.Control Port Timing, I²C Write ................................................................................................... 64
Figure 34.Control Port Timing, I²C Read ................................................................................................... 64
LIST OF TABLES
Table 1. I/O Power Rails ........................................................................................................................... 12
Table 2. Bass Shelving Filter Corner Frequencies .................................................................................... 31
Table 3. Treble Shelving Filter Corner Frequencies ................................................................................. 32
Table 4. Bass Management Cross-Over Frequencies .............................................................................. 35
Table 5. 2-Way Cross-Over Frequencies .................................................................................................. 41
Table 6. Auxiliary Serial Port Data Output ................................................................................................ 43
Table 7. Nominal Switching Frequencies of the Auxiliary Serial Output ................................................... 43
Table 8. PWM Power Output Configurations ............................................................................................ 45
Table 9. Typical Ramp Times for Various VP Voltages ............................................................................ 46
Table 10. PWM Logic-Level Output Configurations .................................................................................. 49
Table 11. PWM Output Switching Rates and Quantization Levels ........................................................... 51
Table 12. Output of PWM_SIG Outputs .................................................................................................... 52
Table 13. SYS_CLOCK Frequency Selection ........................................................................................... 54
Table 14. Input Source Selection .............................................................................................................. 55
Table 15. Serial Audio Interface Format Selection .................................................................................... 55
Table 16. Thermal Foldback Enable Selection ......................................................................................... 57
Table 17. PWM Output Switching Rates and Quantization Levels ........................................................... 58
Table 18. Low-Pass Filter Components - Half-Bridge ............................................................................... 59
Table 19. DC-Blocking Capacitors Values - Half-Bridge ........................................................................... 59
Table 20. Low-Pass Filter Components - Full-Bridge ............................................................................... 60
Table 21. Power Supply Configuration and Settings ................................................................................. 63