DKHiQV-PCI (Fab. Rev. B) User’s Guide
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DKHiQV-PCI (Fab. Rev. B) Subject to Change Without Notice
Revision 1.3 7/2/99
The user can set the display memory type through XR41[0,1], memory size through XR42[2] and the DRAM
data bus width through XR43[4,5] for the B65555. The tables below show the possible configurations:
Note: XR41 = 01h for EDO memory, XR42 = 00h for 256-wide column and XR43 = 10h for 64-bit interface.
Table 4-2 EDO Memory Configuration Types for B65555
SIZE
BANDWIDTH
ORGANIZATION
Qty. needed
Modules
2 MB
64-bit (single bank)
256Kx32
2
U3, U5
4 MB
64-bit (dual bank)
256Kx32
4
U3, U4, U5, U6
