CHAINTECH CT-6LTM, User Manual, Page: 20 / 50

Chapter 2
16
2-5 Main Memory Configuration
The DRAM memory system consists three banks (bank0, bank1, bank2) and the
memory size ranges from 8~384 MBytes. If you only use one bank it does not matter
which one you use and if you use two or more banks, it does not matter which bank
you install first.
DRAM Specifications
DRAM type: 3.3V, 64/72-bit EDO(Extended Data Output) Synchronous
DRAM
Module size: Single/double-side 8/16/32/64/128 MBytes
DRAM speed: 60-ns or faster for EDO DRAM
10/12ns for Synchronous DRAM
Parity: Either parity or non-parity
The compatibility of 64/128MB DIMM is still under testing and cannot be
100% guaranteed.
This mainboard supports 3.3v, unbuffered, 4-clock, SDRAM DIMM only.
Buffered, 5V, or 2-clock SDRAM DIMMs should not be used.
Due to loading anomalies, using DIMM with an 'n x 4' DRAM base on this
mainboard is not recommended. For example, a DIMM that uses sixteen
16Mb x 4 devices should not be used.
ECC DRAM Capability
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This mainboard can be configured to support ECC (Error Check and Correct)
function when utilizing parity DIMM modules. To utilize the chipset's ECC
features, you must use a 72-bit DIMM module.These modules are automatically
detected during bootup. However, the user must configure the DRAM Data
Integrity Mode to "ECC" in BIOS's Chipset Features Setup menu to enable the
ECC function. ECC detects double bit errors and detects and corrects single bit
memory errors on the fly without user intervention. Errors may be generated by
a defective memory module, conflicting memory speeds between different banks,
DMA, etc.