102
TCA2002, Tripath
T C A 2 0 0 2 P I N D E S C R I P T I O N
Pin Function
Description
1
BIASCAP
Bandgap reference times two (typically 2.5VDC). Used to set the common mode
voltage for the input op amps. This pin is not capable of driving external
circuitry.
2
6
FBKP2
FBKP1
Positive switching feedback (Channels 2 & 1)
3 DCMP
Internal mode selection. Grounding this pin enables 16-pulses during startup.
Connecting this pin to V5 disables 16-pulses during startup, which minimizes
turn-on pop. DCMP must be grounded when connected to fet drivers or power
stages using bootstrapped high-side supplies.
4
7
FBKN2
FBKN1
Negative switching feedback (Channels 2 & 1)
5
VPWR
Test pin. Must be left floating.
8 HMUTE
Logic output. A logic high indicates both amplifiers are muted, due to the mute
pin state, or a “fault”.
9, 12
Y1, Y2
Non-inverted switching modulator outputs. (Channels 1 & 2)
10, 11
Y1B, Y2B
Inverted switching modulator outputs. (Channels 1 & 2)
13 NC
No
connect
14,16 OCD2,
OCD1
Over Current Detect inputs. If either pin exceeds V
TOC
, both amplifiers are
muted. Ground if not used. The TCA2002 will try to automatically recover from
an over current fault with an approximately 950mS repetition rate.
15 REF
Internal reference voltage; approximately 1.0 VDC. Connect and 8.25kΩ, 1% to
AGND.
17 VNNSENSE
Negative supply voltage sense input. This pin is used for both over and under
voltage sensing for the VNN supply.
18
OVRLDB
A logic low output indicates the input signal has overloaded the amplifier.
19 VPPSENSE
Positive supply voltage sense input. This pin is used for both over and under
voltage sensing for the VPP supply.
20 AGND
Ground
21
V5
5 Volt power supply input.
22
27
OAOUT1
OAOUT2
Input stage output pins. (Channels 1 and 2)
23, 28
INV1, INV2
Single-ended inputs. Inputs are a “virtual” ground of an inverting opamp with
approximately 2.5VDC bias. The bias at INV1 and INV2 is active, even if the
MUTE pin is high.
24 MUTE
When set to logic high, both amplifiers are muted and in idle mode. When low
(grounded), both amplifiers are fully operational. If left floating, the device stays
in the mute mode. Ground if not used.
25, 26
BBM1, BBM0
Break-before-make timing control to prevent shoot-through in the output
MOSFETs. Please refer to the Application Information section additional
information.
T C A 2 0 0 2 P I N O U T
BIASCAP
FBKP2
DCMP
FBKN2
VPWR
FBKP1
FBKN1
HMUTE
Y1
Y1B
Y2B
Y2
NC
OCD2
1
2
3
4
5
6
7
8
9
10
11
12
13
5
1
4
1
16
17
18
19
20
21
22
23
24
25
26
27
28
REF
OCD1
VNNSENSE
OVRLDB
VPPSENSE
AGND
V5
OAOUT1
INV1
MUTE
BBM1
BBM0
OAOUT2
INV2
Integrated Circuit Diagrams
Summary of Contents for FREESPACE 4400
Page 87: ...87 Circuit Board Layout Diagrams Figure 12 DSP PCB Top Etch Board Layout Diagram ...
Page 88: ...88 Circuit Board Layout Diagrams Figure 13 DSP PCB Bottom Etch Board Layout Diagram ...
Page 90: ...90 Circuit Board Layout Diagrams Figure 18 Amplifier Upper PCB Top Etch Board Layout Diagram ...