16
MODULAR MODEM ELIMINATOR
2.2.6 ITU 1.544-
AND
2.048-M
BPS
I
NTERFACE
M
ODULES
(ME268C
AND
ME267C)
The ITU G.703 1.544-Mbps and 2.048-Mbps interface modules have four-wire
interfaces (one pair for the transmit line and one pair for the receive line). The
line signal (which uses B8ZS coding for the G.703 1.544-Mbps interface and HDB3
for the 2.048-Mbps interface)contains sufficient timing information to allow the
recovery of the clock signal from the received data. The modules are transparent
to any framing of the G.703 signals (which means they do not comply with
ITU G.704).
Thus, the receive path of the G.703 1.544 Mbps and 2.048 Mbps interface
modules always operates on the clock signal recovered from the received line
signal. The clock signal used by the module transmit path can be selected by
means of a jumper. The jumper has three positions:
• INT—the transmit clock is derived from an internal oscillator.
Figure 2-3
in
Section 2.2.5
shows the flow of timing signals with internal timing.
• LBT—the transmit clock is locked to the recovered receive clock.
Figure 2-4
in
Section 2.2.5
shows the flow of timing signals with loopback timing.
• EX—the transmit clock is locked to the clock signal provided by the
receive path of the other interface module installed in the Modular Modem
Eliminator.
Figure 2-5
shows the flow of timing signals for external timing.
Figure 2-5. Flow of timing signals for EX mode.
Transmit
Circuits
Transmit
Line Signal
Receive
Line Signal
Receive
Circuits
Interface
Module
(EX Mode)
Data
Data
Clock from
other Interface
Module
Recovered Clock
Summary of Contents for ME260A
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