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CHAPTER 2: Introduction
2. Introduction
2.1 Functional Description
The G.703 Codirectional Converter converts the ITU-TSS (CCITT) G.703
codirectional (line) interface to standard data-communication interfaces. The
Converter can perform two conversions:
•
Electrical Conversion —
from G.703 to ITU-TSS V.35, V.36/V.11 (EIA RS-
449/422/423), X.21/V.11, or EIA RS-530.
• Data-Rate Conversion —
from 64 kbps to 48 or 56 kbps, when required.
The electrical and rate conversions enable you to connect DCE devices to
PCM transmission equipment.
Different models of the Converter have different interface connectors
depending on which data-commu-nication interface they support:
• Models whose product codes in-clude “
-449
” support EIA RS-422/ 423/ITU-
TSS V.11 signaling on the EIA RS-449/ITU-TSS V.36 physical interface.
The interface connector mounted on these units is an RS-530 DB25 (see
the next paragraph); an included adapter cable patches these to a 37-pin
D-subminiature (“DB37”) female interface connector.
• Models whose product codes include “
-530
” support the EIA RS-530
physical/electrical interface (with ITU-TSS V.11-compatible signal levels);
they have a 25-pin D-subminiature (“DB25”) female interface connector.
• Models whose product codes include “
-V35
” support the ITU-TSS V.35
physical/ electrical interface; they have a 34-pin M-block (“M/34”) female
interface connector.
• Models whose product codes include “
-X21
” support
ITU-TSS V.11 signaling on the ITU-TSS X.21 physical interface; they have
a 15-pin D-subminiature (“DB15”) female interface connector.
Operating full-duplex at a transmission rate of 64 kbps, the Converter has a
range of up to 800 meters (
1
⁄
2
mile) from the PCM equipment. The unit’s
receive-timing source is the recovered clock from the CCITT G.703 receive
pair. You can set a jumper to select any one of these transmit-timing sources:
• Recovered clock from the received pair;
• External timing from the data-communication (DTE) interface; or
• Internal timing (used only for testing and diagnostics).
Two internal 16-bit buffers accommodate the difference in clocking phase.