BELINEA 10 55 70 Service Manual Download Page 21

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via

and CP3. This pulse is

and getting the synchtunixation.

In the event of the horizontal oscillator stop
ping, as occurs during mode change etc., the
ramp generator stops functioning, this prevents
operation of the horizontal output stage imme-
diately after the oscillator has stopped in order
to protect 4301 from excessive voltage.

The ICP2 compares the ramp in pin 2 with the
error voltage on pin 5 and produces a pulse

width modulated output on pin 3. This output

drives through a small pulse transformer,

to the gate of the

QP3. This device acts as

the power switch to the buck regulation stage,
the inductor

acting as the storage element.

During mode change, the B+ supply can be
instantly turned off by pulling up the error
amplifier input on pin 5 and pin 4. These can
be achieved by QP6, QP4 and

which is

driven from the logic signal

Whilst

QP6, QP4 and QP5 can switch off the B+
supply almost instantly, the time taken for the
supply to restart is programmed by

value of

CP16. This capacitor slowly discharges when
QP6 is turned off, thus allowing the B+ voltage
to follow an exponential rising charge curve,

set by the

value

of CP16 and RP24.

The average beam current through the CRT
also flows

through

the secondary high voltage

winding of

connected to pin 8 of

smooths the pulse of current flowing in

the secondary winding and the average DC
current is supplies through resistor

and

Pin 8 is clamped between

and

ground by

When no anode current is

flowing, the voltage at pin 8 is at the clamp
voltage of

When the average secondary

current

flowing exceed

this voltage

begins to drop below

threshold. Thus a

signal is generated which can be fed to video
amplifier for automatic beamcurrent limiting
(ABL). This is fed into the error amplifier.
APWN signal is used to drive a switching
QP3 which drop the voltage down to maintain
a constant EHT, the DC operating point of
which is adjusted by

horizontal output stage is a conventional

diode modulator type.

3.2.5. Horizontal Size Control Circuit

The different DC value output from Pin

passes

through

the

distributed

from

R359 and

one fixed DC value which

is sent to Pin 3 of

so the VDC from Pin 9-10

is not the same, causing Pin 1 of

output a different

after passing though the

buffer, collector of Q353, output to Q354 and
Darlington current amplification though

just the current though H-DY’s current

value

achiev-

ing size control.

In addition,

control is achieved by adding a DC

offset to the output current at

collector propor-

tional to the DAC outputs on pin 9 and 10 of

This DC voltage is switched for a constant period by

which is driven by the

pulse derived

from pin 6 of the

The resultant output is a

current pulse of constant width, which is then aver-
aged by the capacitor

In this way a voltage

proportional to frequency is gained as the reference
for the non inverting input of

diode modulator

pre-amplifier. This in

will ensure that the width

of the scan produced on the screen is constant for all
frequencies of operation for any given DAC output

output of the pre-amplifier is a current source at

the collector of 4353. This current is transformed to
a voltage by resistor

which is connected to the

B+ supply. In this way, any ripple present on the B+
supply rail as a result of anode voltage loading will
be also seen at

collector of Q353. Thus anode

voltage loading effects, which cause ripple on the B+
line, do not influence the scan width as the width is
proportional to the voltage across R365 i.e. inde-
pendent of B+ ripple. This voltage is buffered by the
quasi-darlington pair

and

to drive the

diode modulation output stage. To improve effective
screen width regulation, additional compensation for
high voltage ripple is injected into the amplifier by
the network R312, C323 and

This signal

modulates

horizontal scan amplitude to compen-

sate for loading effects on the anode voltage.

X-RAY Protection Circuit

The feedback pulse voltage from

F.B.T

is regulated through D373 to obtain a DC volt-
age and the appropriate set voltage is distrib-
uted by

and R47 1. When the feedback

pulse voltage exceeds the set voltage, a DC
voltage develops in the cathode of ZD310
which turns on Q370 and Q37 1. As a result,
is turned off (PGMTO is low), putting the

power supply is “OFF” mode. This is the phe-
nomenon of high voltage

Horizontal linearity and CS Switching

Switching CS is necessary to

the lines arc

accordance with the specifications in multi-sync
monitors.

For frequencies

up, RL301 is ON

and

is OFF

and CS

is C3 1

For frequencies